參數(shù)資料
型號(hào)： AM79C930
廠商： Advanced Micro Devices, Inc.
英文描述： PCnet-Mobile Single-Chip Wireless LAN Media Access Controller
中文描述： PCnet -移動(dòng)單芯片無線局域網(wǎng)媒體接入控制器
文件頁數(shù)： 102/161頁
文件大小： 691K
代理商： AM79C930
AMD
P R E L I M I N A R Y
102
Am79C930
2
ADDA
0
A/D D/A mode. ADDA is used with ENEXT (TCR25[6]), ENSAR
(TCR25[5]), and UXA2DST (TCR25[7]) to determine the mode of
operation of the A/D portion of the Am79C930 device according to
the following table:
ADDA
TIR26[2]
0
0
0
0
0
0
1
1
ENEXT
TCR25[6]
0
0
0
0
1
1
X
X
ENSAR
TCR25[5]
0
0
1
1
0
1
0
1
UXA2DST
TCR25[7]
0
1
0
1
X
X
X
X
A/D
mode
internal_A
reserved
internal_B
internal_C
external
reserved
reserved
D/A mode
For a complete description of the operation of each of the above
modes, see the RSSI A/D subsection of the TAI section.
A/D Source Select. When SRCS is set to 0, then ADIN1 is the input
to the A/D converter for internal A/D modes. When SRCS is set to 1,
then ADIN2 is the input to the A/D converter for internal A/D modes.
SRCS has no effect when external or D/A mode has been selected.
Start Conversion. Whenever a 1 is written to STRTC (i.e., even if
the bit value is already 1), the A/D begins the conversion process on
the current comparator input, unless a conversion cycle is currently
under way. STRTC is intended for useonly at times when the A/D
conversion process is not controlled by the antenna diversity logic.
That is, whenever RXS=0, writing a 1 to STRTC will; however,
initiate a conversion cycle regardless of the state of the RXS bit
of TIR16.
1
SRCS
0
0
STRTC
0
TIR27: Serial Approximation Register
This register is the SAR register. Contains the A/D con-
verter’s Serial Approximation Register value. A read
from this register will give the current value of the SAR in
the A/D circuit.
Bit
Name
Reset Value
Description
7
CACT
0
Conversion Active. When an A/D conversion is being performed,
the Am79C930 device will set this bit to a 1. When the conversion
operation has completed, the Am79C930 device will reset this bit to
a 0.
Serial Approximation Register. Contains the A/D converter’s Serial
Approximation Register value. A read from this register will give the
current value of the SAR in the A/D circuit. When CACT is a 1, then
this value is not stable. A write to this register will cause the written
value to be driven onto the SAR[6:0] pins if the ADDA bit of TIR26 is
set to 1. If the ADDA bit of TIR26 is set to 0, then a write to SAR[6:0]
bits of TIR27 will have no effect on the internal A/D conversion proc-
ess or on the SAR[6:0] output pins.
6–0
SAR[6:0]
pin
相關(guān)PDF資料
PDF描述
AM79C930VCW PCnet-Mobile Single-Chip Wireless LAN Media Access Controller
AM79C940VCW Media Access Controller for Ethernet (MACE)
AM79C940 Media Access Controller for Ethernet (MACE)
AM79C940JCW Media Access Controller for Ethernet (MACE)
AM79C940KCW Media Access Controller for Ethernet (MACE)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C930EVAL-HW 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am79C930EVAL-HW - PCnet-Mobile Evaluation Kit
AM79C930VC/W 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-Mobile Single-Chip Wireless LAN Media Access Controller
AM79C930VCW 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-Mobile Single-Chip Wireless LAN Media Access Controller
AM79C940 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE)
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