- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366550 > AM79C930 (Advanced Micro Devices, Inc.) PCnet-Mobile Single-Chip Wireless LAN Media Access Controller PDF資料下載
參數(shù)資料
| 型號(hào)： | AM79C930 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnet-Mobile Single-Chip Wireless LAN Media Access Controller |
| 中文描述： | PCnet -移動(dòng)單芯片無(wú)線局域網(wǎng)媒體接入控制器 |
| 文件頁(yè)數(shù)： | 83/161頁(yè) |
| 文件大?。?/td> | 691K |
| 代理商： | AM79C930 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)當(dāng)前第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)
P R E L I M I N A R Y
AMD
83
Am79C930
MIR8: Flash Wait States
This register gives the Flash Wait states.
Bit
Name
Reset Value
Description
7:4
Reserved
–
Reserved. Must be written as a 0. Reads of this bit produce
undefined data.
When this bit equals 1, then the host can access memory; if 0, then
the host access is blocked completely
Reserved. Must be written as a 0. Reads of this bit produce
undefined data.
These bits must be set equal to or greater than the number of wait
states that are generated internally in the 80188 core as defined by
the programming of the R1 and R0 bits of the 80188 UMCS register.
Wait states programmed into FLASHWAIT will cause wait states to
be inserted into 80188 access to Flash and system accesses to
Flash. Each wait state added to a Flash access is equivalent to two
CLKIN periods. These bits are interpreted as follows:
3
HOSTALLOW
1
2
Reserved
–
1:0
FLASHWAIT[1:0]
11b
Number Of Wait
States Used By
Arbitration Logic For
Flash Accesses
FLASHWAIT[1:0]
11
10
01
00
3
2
1
0
MIR9: TCR Mask STSCHG Data
This register contains TCR Mask, STSCHG Data, and
SRAM Wait States.
Bit
Name
Reset Value
Description
7
CLKGT20
1
CLKIN input is greater than 20 MHz. This bit must be set to a 1 by
the 80188 code whenever the Am79C930 device is operating in a
system that uses a source for the CLKIN input that is greater than
20 MHz in frequency. This information is needed in order to insure
that the TAI section of the Am79C930 device is not pushed beyond
design limits. Specifically, when CLKGT20 is set to 1, then the
CLKIN signal is divided by 2 before being fed to the TAI section.
CLKGT20 is also used to calibrate the time delay generated by the
HOSTLONGWAIT counter. Specifically, if CLKGT20 = 1, then the
number of CLKIN cycles that are counted for a system access
WAIT period is 192 CLKIN periods; if CLKGT20 = 0, then the num-
ber of CLKIN cycles that are counted for a system access WAIT pe-
riod is 96 CLKIN periods. This time adjustment is needed in order to
avoid creating a PCMCIA WAIT signal that exceeds the 12.1
μ
s
limit indicated in the PCMCIA specification.
If the source for the CLKIN input is a 20 MHz or slower clock signal,
then this bit should remain reset at 0.
The CLKGT20 bit has an effect on the network data rate. See the
table in the Data Rate bit section in TCR30[2:0].
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C930VCW | PCnet-Mobile Single-Chip Wireless LAN Media Access Controller |
| AM79C940VCW | Media Access Controller for Ethernet (MACE) |
| AM79C940 | Media Access Controller for Ethernet (MACE) |
| AM79C940JCW | Media Access Controller for Ethernet (MACE) |
| AM79C940KCW | Media Access Controller for Ethernet (MACE) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C930EVAL-HW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am79C930EVAL-HW - PCnet-Mobile Evaluation Kit |
| AM79C930VC/W | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-Mobile Single-Chip Wireless LAN Media Access Controller |
| AM79C930VCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-Mobile Single-Chip Wireless LAN Media Access Controller |
| AM79C940 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Media Access Controller for Ethernet (MACE) |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。