162
Am79C971
P R E L I M I N A R Y
FDEN and AUIFD bits in BCR9
are set to 1).
Read/Write accessible always.
FDLSE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
7
PSE
Pulse Stretcher Enable. When
this bit is set, the LED illumination
time is extended for each new oc-
currence of the enabled function
for this LED output. A value of 0
disables the pulse stretcher.
Read/Write accessible always.
PSE is set to 1 by H_RESET and
is not affected by S_RESET or
setting the STOP bit.
6
LNKSE
Link Status Enable. When this bit
is set, a value of 1 will be passed
to the LEDOUT bit in this register
when the T-MAU is in Link Pass
state. When the T-MAU is in Link
Fail state, a value of 0 is passed
to the LEDOUT bit. This bit does
not reflect the link status of the
external PHY.
The function of this bit is masked
if the 10BASE-T port is operating
in full-duplex mode. This allows a
Half-Duplex Link Status LED and
a Full-Duplex Link Status LED at
the same time.
Read/Write accessible always.
LNKSE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
5
RCVME
Receive Match Status Enable.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network that has
passed the address match func-
tion for this node. All address
matching modes are included:
physical, logical filtering, broad-
cast, and promiscuous.
Read/Write accessible always.
RCVME is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
4
XMTE
Transmit Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is transmit
activity on the network.
Read/Write accessible always.
XMTE is set to 1 by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
3
RXPOLE
Receive Polarity Status Enable.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when normal polarity of
the RXD
±
pair has not been re-
versed.
Receive polarity indication is val-
id only if the T-MAU is in link pass
state.
Read/Write accessible always.
RXPOLE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
2
RCVE
Receive Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network.
Read/Write accessible always.
RCVE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
1
JABE
Jabber Status Enable. When this
bit is set, a value of 1 is passed to
the LEDOUT bit in this register
when the Am79C971 controller is
jabbering on the network.
Read/Write accessible always.
JABE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
0
COLE
Collision Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is collision
activity on the network. The activ-
ity on the collision inputs to the
AUI port within the first 4
μ
s after
every transmission for the pur-
pose of SQE testing will not
cause the LEDOUT bit to be set.