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參數(shù)資料
| 型號(hào)： | AM79C971KCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | IC LOGIC 16211 24-BIT FET BUS SWITCH -40+85C TSSOP-56 35/TUBE |
| 中文描述： | 4 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP16 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁(yè)數(shù)： | 73/265頁(yè) |
| 文件大?。?/td> | 3190K |
| 代理商： | AM79C971KCW |
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Am79C971
73
ANSI 802.3) Standard. The transmit function for data
output meets the propagation delays and jitter speci-
fied by the standard.
Twisted Pair Receive Function
The receiver complies with the receiver specifications
of the ISO 8802-3 (IEEE/ANSI 802.3) 10BASE-T Stan-
dard, including noise immunity and received signal re-
jection criteria (
Smart Squelch
). Signals meeting these
criteria appearing at the RXD
±
differential input pair are
routed to the MENDEC. The receiver function meets
the propagation delays and jitter requirements speci-
fied by the standard. The receiver squelch level drops
to half its threshold value after unsquelch to allow re-
ception of minimum amplitude signals and to offset car-
rier fade in the event of worst case signal attenuation
and crosstalk noise conditions.
Note that the 10BASE-T Standard defines the receive
input amplitude at the external Media Dependent Inter-
face (MDI). Filter and transformer loss are not speci-
fied. The T-MAU receiver squelch levels are defined to
account for a 1-dB insertion loss at 10 MHz, which is
typical for the type of receive filters/transformers em-
ployed.
Normal 10BASE-T compatible receive thresholds are
employed when the LRT bit (CSR15, bit 9) is cleared to
0. When the LRT bit is set to 1, the Low Receive
Threshold option is invoked, and the sensitivity of the T-
MAU receiver is increased. This allows longer line
lengths to be employed, exceeding the 100-meter (m)
target distance of normal 10BASE-T (assuming typical
24 AWG cable). The increased receiver sensitivity
compensates for the increased signal attenuation
caused by the additional cable distance.
However, making the receiver more sensitive means
that it is also more susceptible to extraneous noise, pri-
marily caused by coupling from co-resident services
(crosstalk). For this reason, it is recommended that
when using the Low Receive Threshold option that the
service should be installed on 4-pair cable only. Multi-
pair cables within the same outer sheath have lower
crosstalk attenuation and may allow noise emitted from
adjacent pairs to couple into the receive pair, being of
sufficient amplitude to falsely unsquelch the T-MAU.
Link Test Function
The Link Test Function is implemented as specified by
the 10BASE-T standard. During periods of transmit
pair inactivity,
link beat pulses
will be periodically sent
over the twisted pair medium to constantly monitor me-
dium integrity.
When the link test function is enabled (DLNKTST bit in
CSR15 is cleared), the absence of link beat pulses and
receive data on the RXD
±
pair will cause the T-MAU to
go into a Link Fail state. In the Link Fail state, data
transmission, data reception, data loopback and the
collision detection functions are disabled and remain
disabled until valid data or more than five consecutive
link pulses appear on the RXD
±
pair. During Link Fail,
the Link Status signal is inactive. When the link is iden-
tified as functional, the Link Status signal is asserted.
The LED0 pin displays the Link Status signal by default.
The T-MAU will power up in the Link Fail state and the
normal algorithm will apply to allow it to enter the Link
Pass state. If T-MAU is selected using the PORTSEL
bits in CSR15, the T-MAU will be forced into the Link
Fail state when moving from AUI to T-MAU selection.
Transmission attempts during Link Fail state will pro-
duce no network activity and will produce LCAR and
CERR error indications.
In order to interoperate with systems which do not im-
plement Link Test, this function can be disabled by set-
ting the DLNKTST bit in CSR15. With link test disabled,
the data driver, receiver and loopback functions, as well
as collision detection, remain enabled irrespective of
the presence or absence of data or link pulses on the
RXD
±
pair. Link Test pulses continue to be sent regard-
less of the state of the DLNKTST bit.
Polarity Detection and Reversal
The T-MAU receive function includes the ability to invert
the polarity of the signals appearing at the RXD
±
pair if
the polarity of the received signal is reversed (such as
in the case of a wiring error). This feature allows data
frames received from a reverse wired RXD
±
input pair
to be corrected in the T-MAU prior to transfer to the
MENDEC. The polarity detection function is activated
following H_RESET or Link Fail, and it will reverse the
receive polarity based on both the polarity of any previ-
ous link beat pulses and the polarity of subsequent
frames with a valid End Transmit Delimiter (ETD).
When in the Link Fail state, the T-MAU will recognize
link beat pulses of either positive or negative polarity.
Exit from the Link Fail state is made due to the recep-
tion of 5 to 6 consecutive link beat pulses of identical
polarity. On entry to the Link Pass state, the polarity of
the last five link beat pulses is used to determine the
initial receive polarity configuration, and the receiver is
reconfigured to subsequently recognize only link beat
pulses of the previously recognized polarity.
Positive link beat pulses are defined as received signal
with a positive amplitude greater than 585 mV (LRT =
1) with a pulse width of 60 ns to 200 ns. This positive
excursion may be followed by a negative excursion.
This definition is consistent with the expected received
signal at a correctly wired receiver, when a link beat
pulse, which fits the template of Figure 14-12 of the
10BASE-T Standard, is generated at a transmitter and
passed through 100 m of twisted pair cable.
Negative link beat pulses are defined as received sig-
nals with a negative amplitude greater than 585 mV
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相關(guān)代理商/技術(shù)參數(shù) |
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| AM79C971VCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus |
| AM79C972 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BKC\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C972BKC\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C972BKCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
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