參數(shù)資料
型號： AM79C972BKCW
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
中文描述： 5 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP16
封裝： PLASTIC, QFP-160
文件頁數(shù)： 73/130頁
文件大?。?/td> 1580K
代理商： AM79C972BKCW
Am79C972
73
Figure 37.
MII Receive Frame Tagging
Figure 38.
GPSI Mode Frame Tagging
Expansion Bus Interface
The Am79C972 controller contains an Expansion Bus
Interface that supports Flash and EPROM devices as
boot devices, as well as provides read/write access to
Flash or EPROM.
The signal AS_EBOE is provided to strobe the upper 8
bits of the address into an external
‘
374 (D flip-flop) ad-
dress latch. AS_EBOE is asserted LOW during
EPROM/Flash read operations to control the OE input
of the EPROM/Flash.
The Expansion Bus Address is split into two different
buses, EBUA_EBA[7:0] and EBDA[15:8]. The
EBUA_EBA[7:0] provides the least and the most signif-
icant address byte. When accessing EPROM/Flash,
the EBUA_EBA[7:0] is strobed into an external
‘
374 (D
flip-flop) address latch. This constitutes the most signif-
icant portion of the Expansion Bus Address. For
EPROM/Flash accesses, EBUA_EBA[7:0] constitutes
the remaining least significant address byte. For byte
oriented EPROM/Flash accesses, EBDA[15:8] consti-
tutes the upper or middle address byte. EBADDRU
(BCR29, bits 3-0) should be set to 0 when not used,
since EBADDRU constitutes the EBUA portion of the
EBUA_EBA address byte and is strobed into the exter-
nal
’
374 address latch.
The signal EROMCS is connected to the CS/CE input
of the EPROM/Flash. The signal EBWE is connected
to the WE of the Flash device.
The Expansion Data Bus is configured for 8-bit byte ac-
cess during EPROM/Flash accesses. During EPROM/
Flash accesses, EBD[7:0] provides the data byte. See
Figure 39, Figure 40, and Figure 41.
Expansion ROM - Boot Device Access
The Am79C972 controller supports EPROM or Flash
as an Expansion ROM boot device. Both are config-
ured using the same methods and operate the same.
See the previous section on Expansion ROM transfers
to get the PCI timing and functional description of the
transfer method. The Am79C972 controller is function-
ally equivalent to the PCnet-PCI II controller with Ex-
pansion ROM. See Figure 40 and Figure 41.
The Am79C972 controller will always read four bytes for
every host Expansion ROM read access. The interface
to the Expansion Bus runs synchronous to the PCI bus
interface clock. The Am79C972 controller will start the
read operation to the Expansion ROM by driving the
upper 8 bits of the Expansion ROM address on
EBUA_EBA[7:0]. One-half clock later, AS_EBOE goes
high to allow registering of the upper address bits ex-
ternally. The upper portion of the Expansion ROM ad-
dress will be the same for all four byte read cycles.
RX_CLK
RX_DV
MIIRXFRTGE
MIIRXFRTGD
SF/BD
21485C-40
SRDCLK
MIIRXFRTGE
MIIRXFRTGD
SFD
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7
SFBD
Bit8
Bitx Bity Bitz
Note:
Bitz is last data bit.
..
..
..
..
SRD
21485C-41
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C972BKD/W 制造商:Advanced Micro Devices 功能描述:
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AM79C972BVC 制造商:Advanced Micro Devices 功能描述:
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