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參數(shù)資料
| 型號： | AMC8500QS16 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | TWO PHASE VARIABLE SPEED FAN MOTOR CONTROLLER |
| 中文描述： | 兩相流變速風扇電機控制器 |
| 文件頁數(shù)： | 10/27頁 |
| 文件大?。?/td> | 648K |
| 代理商： | AMC8500QS16 |
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Preliminary Specification
aMC8500
Reference
A pinned out 3.5 V Reference with a tolerance ±5.0% is made available to ease the implementation of motor control and
allow additional system features. The Reference can be used to program the minimum speed set input, provide Hall sensor
power, or thermal sensor voltage scaling when used in conjunction with the uncommitted Op Amp. The Reference output
also provides a means to selectively enable or disable the device's automatic low current power down feature. Automatic
power down is enabled if the output load current is 1.0 mA or less, and disabled if it is 2.0 mA or greater. The Reference is a
source only output and therefore is not designed to sink current from a higher voltage source. It is capable of sourcing in
excess of 10 mA over temperature and has short circuit protection. In applications that require additional current capability,
the output can be buffered with the addition of an external PNP transistor as shown in Figure 25. This simple circuit has the
advantage of moving any additional regulator power dissipation off chip but it does not maintain output short circuit
protection.
Op Amp
A fully compensated Op Amp with access to both inputs and output is provided to facilitate thermal sensor voltage scaling.
The amplifier features a wide input common mode voltage range that extends from ground to 4.2 V, a DC voltage gain of
100 dB, and a 70 kHz gain bandwidth product. The amplifier output exhibits an voltage swing that extends from ground to
V
DD
- 1.7 V, is capable of sinking and sourcing up to 10 mA, and is unity gain stability when driving capacitive loads. In
applications where a single amplifier input can exceed the upper level of the common mode voltage range, the output will
always maintain the proper state. If both inputs exceed the upper level of the common mode voltage range, a low state
output phase reversal can occur and although non destructive, it may result in unexpected system behavior.
If the intended application does not require use of the Op Amp, the inputs must be connected to a fixed low impedance
source in a manner that will force the output into a defined state. This will prevent the possibility of amplifying unwanted
noise which can result in erratic circuit behavior. Figure 27 shows three suggested connection methods.
Frequency Generator / Rotor Lock
Motor speed and fault signals are provided by the Frequency Generator and Rotor Lock output at Pin 15. These signals
can provide diagnostic information to a thermal system controller. During normal operation, the output provides a digital
square wave that switches at the Hall sensor commutation frequency. Internally, this signal is used to continuously reset the
Fault Timer. If the motor encounters an obstruction, the decrease in rotational speed will result in a corresponding increase
in time between reset pulses. If this time exceeds 0.25 s (t
on(Flt)
) a fault will be detected, which in turn will terminate motor
drive and place Pin 15 into a high state, thus indicating a rotor lock condition. After an off time cool down period of 2.0 s
(t
off(Flt)
) has elapsed, the Fault Timer circuit will apply maximum drive in attempt to restart the motor for another 0.25 s. This
on/off cycling will repeat indefinitely until the motor restarts, or is commanded to stop by the Speed Control and Minimum
Speed Set inputs. Upon a successful restart, Pin 15 will resume switching at the Hall commutation rate after completion of
the Kick Start interval.
The Frequency Generator and Rotor Lock output consists of an N-channel open drain device and therefore requires an
external pull-up resistor. An internal high gain buffer with hysteresis is used to insure that the output waveform is always
rectangular even when the peak to peak Hall output signals are at a low level. The operating waveforms are shown in
Figure 17.
Figure 17- Frequency Generator / Rotor Lock Waveforms
P
P
- 10 -
Rotor Locked or Rotating Below
Minimum Hall Frequency
Constant Speed
Accelerating
Constant Speed
Differential
Hall Inputs
Frequency
Generator /
Rotor Lock
Output
Defaults To High State After Fault Detected
Fault Timer
t
off(Flt)
2.0 s
t
on(Flt)
0.25 s
Possible Low Or High State
Off
Fault
Detected
0.25 s
On
On
Off
Motor Drives
Rotor Locked
Rotor Free
Running
On
Retry
Cool Down
Running
Cool Down
Kick
Start
1.0 s
Andigilog, Inc. 2006
www.andigilog.com
August 2006 - 70A04018
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