參數(shù)資料
型號(hào)： AMC8500QS16
廠(chǎng)商： Electronic Theatre Controls, Inc.
英文描述： TWO PHASE VARIABLE SPEED FAN MOTOR CONTROLLER
中文描述： 兩相流變速風(fēng)扇電機(jī)控制器
文件頁(yè)數(shù)： 9/27頁(yè)
文件大?。?/td> 648K
代理商： AMC8500QS16
Preliminary Specification
aMC8500
Hall Inputs
Rotor position is detected by a single Hall sensor to enable proper motor drive commutation. The H+ and H- Amplifier
inputs are designed to interface with a wide variety of economical 4 pin unbuffered 'naked' or 3 pin buffered 'digital' Hall
sensor types. The unbuffered sensors provide a low level differential output signal that is directly proportional to the rotors
applied magnetic field. The sensor outputs connect directly to the H+ and H- inputs. The Amplifier has a differential input
sensitivity of 20 mV with a common mode voltage range that extends from V
DD
to ground. By extending the input range to
include ground, the need for offsetting the Hall output voltage with a series ground resistor is eliminated. Figures 20 through
22 show three methods of biasing unbuffered Hall sensors. The aMC8500 Hall Amplifier features enhanced noise rejection
by combining a small level of input hysteresis with a propriety zero crossing detector and a timed lockout.
The buffered Hall sensors provide a high level digital output signal that changes state in direct response the rotor magnetic
pole transitions. This output signal is single ended and can be applied to either the H+ or H- input while biasing the unused
input to a level that is within the output voltage swing of the sensors. Economical buffered Hall sensors typically contain an
NPN open collector sink only output which requires a pull-up resistor. Figures 23 and 24 show two methods for biasing
buffered Hall sensors.
Commutation
The aMC8500 features a non-overlapping commutation delay circuit that prevents simultaneous drive conduction for
reduced power supply current spikes and radio frequency interference (RFI). The non-overlap delay time (t
dly
) is internally set
to 40 μs. The commutation waveforms and truth table are shown below in Figures 15 and 16.
Figure 15- Two Phase, Two Step, Half Wave Commutation Waveforms
P
P
- 9 -
Figure 16- Commutation Truth Table
X = Don’t care
Hall Inputs
Drive Outputs
Phase 1
(Pin 16)
Off
Low
Off
+
(Pin 3)
Low
High
X
-
(Pin 4)
High
Low
X
System
Fault
Phase 2
(Pin 1)
Low
Off
Off
FGRL
Output
(Pin 15)
None
None
Yes
Low
High
High
0
180
360
540
720
Rotor Electrical Position (Degrees)
Full Speed (100% PWM)
t
dly(Com)
H +
H -
Hall
Inputs
FGRL
Output
Voltage
Phase 2
Drain
Current
Phase 1
Drain
Voltage
Phase 2
Drain
Voltage
V
Motor
0
V
Clamp
0
0
0
Phase 1
Drain
Current
0
180
360
540
720
V
Clamp
V
Motor
0
t
dly(Com)
Reduced Speed (
≈
50% PWM)
Andigilog, Inc. 2006
www.andigilog.com
August 2006 - 70A04018
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