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參數(shù)資料
| 型號： | AN231K04-DVLP3 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Dynamically Reconfigurable dpASP |
| 中文描述： | 動態(tài)可重構(gòu)dpASP |
| 文件頁數(shù)： | 12/24頁 |
| 文件大小： | 445K |
| 代理商： | AN231K04-DVLP3 |
AN231E04 Datasheet – Dynamically Reconfigurable dpASP
Power Supply Rejection Ratio
PSRR
DS231000-U001d
- 12 -
-
62
-
dB
DC. Amp Gain = 0dB
250kHz clock, 1kHz 0dBu output.
See figure 1
Unity-gain. 0dBu input at 1KHz
20dB-gain, 250kHz clock. IIdle
channel.
60dB-gain, 250kHz clock. IIdle
channel.
20dB-gain, 250kHz clock. 0dBu
output at 1KHz. Noise and
distortion summed from 22Hz to
22KHz
20dB-gain, 250kHz clock. 0dBu
output at 1KHz,
See figure 2
Common Mode Rejection Ratio
CMRR
-
81
-
dB
Large Signal Harmonic Distortion
Input Resistance
Input Capacitance
Dist
Rin
Cin
-
-77
-
-
dB
10
-
Mohm
pF
5.0
Input Referred Noise Floor
IRN
-
20
-
nV/
√
Hz
Input Referred Noise Floor
IRN
-
4
-
nV/
√
Hz
Signal-to Noise and Distortion
Ratio
SINAD
-
76
-
dB
Spurious Free Dynamic Range
SFDR
-
90
-
dB
Figure 1: ChopperAmplifier CMRR
Figure 2: ChopperAmplifier SFDR
1.5.5
(The IO cells use the same circuits as the input cells)
Parameter
Min load R
Rout
Analog Outputs, Loading & Signal Conditioning
Symbol
RloadMin
R
OUTIO
Min
1
-
Typ
-
33
Max
-
-
Unit
KOhm
Ohms
Comment
to VSS
For IO opamp to package pins.
For CAB opamp to package pins,
(depends on CAB and IO used)
Core to outside in bypass I/O.
to VSS.
Differential voltage where -80dB
THD is reached for IO cell in SnH
mode. 10pF load.
Derived from on chip VMR voltage.
R
OUTCAB
-
530
-
Ohms
Max load C
Large signal swing
Cload Max
-
-
100
pF
SIG
LARGE
VMR-
1.375
-
VMR+
1.375
V
Common Mode
Voltage
Common Mode
Voltage Deviation
Vcm
-
VMR
-
V
VcmDV
-
-
-
mV
Deviation from supplied VMR.
Values are quoted for IO cell or
CAB opamp. See other tables.
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