ProASICPLUS Flash Family FPGAs 4- 4 v5.9 v3.2 The "ProASICPLUS Clock Manage" />
參數(shù)資料
型號: APA075-TQG144I
廠商: Microsemi SoC
文件頁數(shù): 82/178頁
文件大小: 0K
描述: IC FPGA PROASIC+ 75K 144-TQFP
標準包裝: 60
系列: ProASICPLUS
RAM 位總計: 27648
輸入/輸出數(shù): 107
門數(shù): 75000
電源電壓: 2.3 V ~ 2.7 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 144-LQFP
供應商設(shè)備封裝: 144-TQFP(20x20)
ProASICPLUS Flash Family FPGAs
4- 4
v5.9
v3.2
In the "Calculating Typical Power Dissipation" section, P9 was changed to 7.5 mW.
v3.1
The datasheet was updated to include references to guidelines concerning the use of certain
ProASICPLUS I/O standards.
v3.0
In Table 2-2 Array Coordinates, the Memory Rows – Bottom coordinates were changed.
changed from 0.3 to –0.3.
In the "Output Buffer Delays" section, the OB25LPLL tDHL Standard changed to 5.3.
In the "Sample Macrocell Library Listing" section, the AND2 Standard maximum changed to 0.7
and the –F maximum changed to 0.8.
v2.0
The "Plastic Device Resources" section was updated.
ii
The Introduction section in the "ProASICPLUS Clock Management System" section was updated.
The "Nominal Supply Voltages’ section was updated.
1-34
Previous version
Changes in current version (v5.9)
Page
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