參數(shù)資料
型號: AT32AP7001-ALUT
廠商: Atmel
文件頁數(shù): 21/65頁
文件大?。?/td> 0K
描述: IC MCU 32BIT AVR32 208-LQFP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 180
系列: AVR®32 AP7
核心處理器: AVR
芯體尺寸: 32-位
速度: 150MHz
連通性: EBI/EMI,I²C,MMC,PS2,SPI,SSC,UART/USART,USB
外圍設(shè)備: AC'97,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 90
程序存儲器類型: ROMless
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: D/A 2x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 208-LQFP
包裝: 托盤
配用: ATAVRONEKIT-ND - KIT AVR/AVR32 DEBUGGER/PROGRMMR
ATNGW100-ND - KIT AVR32 NETWORK GATEWAY
ATSTK1000-ND - KIT STARTER FOR AVR32AP7000
28
32015G–AVR32–09/09
AT32AP7001
is input to VMU2. Figure 8-3 on page 28 shows how the pixel triplet is found by taking the pixel
addressed by the base address and following the arrow to find the next two pixels which makes
up the triplet.
Figure 8-3.
Horizontal Filter Mode Pixel Addressing
The following expression represents what is computed by the VMUs in Horizontal Filter Mode:
8.5.3
Vertical Filter Mode
In Vertical Filter Mode the input pixel source addresses INx, INy and INz represent the base of a
pixel triplet found by following the vertical arrow shown in Figure 8-4 on page 28. The pixel triplet
{IN(x), IN((x+4)%11), IN((x+8)%11)} is input to VMU0, the pixel triplet {IN(y), IN((y+4)%11),
IN((y+8)%11)} is input to VMU1 and the pixel triplet {IN(z), IN((z+4)%11), IN((z+8)%11)} is input
to VMU2.
Figure 8-4.
Vertical Filter Mode Pixel Addressing
INPIX0
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
INPIX1
INPIX2
VMU0_OUT
COEFF0_0 COEFF0_1 COEFF0_2
IN(x+0)
IN(x+1)
IN(x+2)
OFFSET0 or VMU0_OUT
()
+
=
VMU1_OUT
COEFF1_0 COEFF1_1 COEFF1_2
IN(y+0)
IN(y+1)
IN(y+2)
OFFSET1 or VMU1_OUT
()
+
=
VMU2_OUT
COEFF2_0 COEFF2_1 COEFF2_2
IN(z+0)
IN(z+1)
IN(z+2)
OFFSET2 or VMU2_OUT
()
+
=
INPIX0
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
INPIX1
INPIX2
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