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參數(shù)資料
| 型號： | AT32UC3A0512 |
| 廠商： | Atmel Corp. |
| 英文描述： | AVR32 32-Bit Microcontroller |
| 中文描述： | AVR32 32位微控制器 |
| 文件頁數(shù)： | 61/109頁 |
| 文件大?。?/td> | 10824K |
| 代理商： | AT32UC3A0512 |
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40
ATtiny20 [DATASHEET]
8235E–AVR–03/2013
9.3.3
GIFR – General Interrupt Flag Register
Bits 7:6 – Res: Reserved Bits
These bits are reserved and will always read as zero.
Bit 5 – PCIF1: Pin Change Interrupt Flag 1
When a logic change on any PCINT[11:8] pin triggers an interrupt request, PCIF1 becomes set (one). If the I-bit in SREG
and the PCIE1 bit in GIMSK are set (one), the MCU will jump to the corresponding Interrupt Vector. The flag is cleared
when the interrupt routine is executed. Alternatively, the flag can be cleared by writing a logical one to it.
Bit 4 – PCIF0: Pin Change Interrupt Flag 0
When a logic change on any PCINT[7:0] pin triggers an interrupt request, PCIF becomes set (one). If the I-bit in SREG
and the PCIE0 bit in GIMSK are set (one), the MCU will jump to the corresponding Interrupt Vector. The flag is cleared
when the interrupt routine is executed. Alternatively, the flag can be cleared by writing a logical one to it.
Bits 3:1 – Res: Reserved Bits
These bits are reserved and will always read as zero.
Bit 0 – INTF0: External Interrupt Flag 0
When an edge or logic change on the INT0 pin triggers an interrupt request, INTF0 becomes set (one). If the I-bit in
SREG and the INT0 bit in GIMSK are set (one), the MCU will jump to the corresponding Interrupt Vector. The flag is
cleared when the interrupt routine is executed. Alternatively, the flag can be cleared by writing a logical one to it. This flag
is always cleared when INT0 is configured as a level interrupt.
9.3.4
PCMSK1 – Pin Change Mask Register 1
Bits 7:4 – Res: Reserved Bits
These bits are reserved and will always read as zero.
Bits 3:0 – PCINT[11:8] : Pin Change Enable Mask 11:8
Each PCINT[11:8] bit selects whether pin change interrupt is enabled on the corresponding I/O pin. If PCINT[11:8] is set
and the PCIE1 bit in GIMSK is set, pin change interrupt is enabled on the corresponding I/O pin. If PCINT[11:8] is
cleared, pin change interrupt on the corresponding I/O pin is disabled.
Bit
76543210
–
PCIF1
PCIF0
–
INTF0
GIFR
Read/Write
R
R/W
R
R/W
Initial Value
0
00000
Bit
7
6
5
4
3
2
1
0
–
PCINT11
PCINT10
PCINT9
PCINT8
PCMSK1
Read/Write
R
R/W
Initial Value
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AT32UC3A0512_08 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:AVR32 32-Bit Microcontroller |
| AT32UC3A0512_09 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:AVR 32 32-Bit Microcontroller |
| AT32UC3A0512_1 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:AVR32 32-Bit Microcontroller |
| AT32UC3A0512-ALTES | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:AVR32 32-Bit Microcontroller |
| AT32UC3A0512-ALTR | 功能描述:MCU AVR32 512K FLASH 144LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:AVR®32 UC3 A0 標(biāo)準(zhǔn)包裝:1,500 系列:AVR® ATtiny 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，LIN，SPI，UART/USART，USI 外圍設(shè)備:欠壓檢測/復(fù)位，POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):16 程序存儲器容量:8KB（4K x 16） 程序存儲器類型:閃存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 11x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:帶卷 (TR) |
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