參數(shù)資料
型號(hào): AT32UC3A0512
廠商: Atmel Corp.
英文描述: AVR32 32-Bit Microcontroller
中文描述: AVR32 32位微控制器
文件頁(yè)數(shù): 90/109頁(yè)
文件大?。?/td> 10824K
代理商: AT32UC3A0512
67
ATtiny20 [DATASHEET]
8235E–AVR–03/2013
mode, the operation is inverted. The dual-slope operation has lower maximum operation frequency than single slope
operation. However, due to the symmetric feature of the dual-slope PWM modes, these modes are preferred for motor
control applications.
Figure 11-7. Phase Correct PWM Mode, Timing Diagram
In phase correct PWM mode the counter is incremented until the counter value matches TOP. When the counter reaches
TOP, it changes the count direction. The TCNT0 value will be equal to TOP for one timer clock cycle. The timing diagram
for the phase correct PWM mode is shown on Figure 11-7. The TCNT0 value is in the timing diagram shown as a
histogram for illustrating the dual-slope operation. The diagram includes non-inverted and inverted PWM outputs. The
small horizontal line marks on the TCNT0 slopes represent Compare Matches between OCR0x and TCNT0.
The Timer/Counter Overflow Flag (TOV0) is set each time the counter reaches BOTTOM. The Interrupt Flag can be used
to generate an interrupt each time the counter reaches the BOTTOM value.
In phase correct PWM mode, the compare unit allows generation of PWM waveforms on the OC0x pins. Setting the
COM0x[1:0] bits to two will produce a non-inverted PWM. An inverted PWM output can be generated by setting the
COM0x[1:0] to three: Setting the COM0A0 bits to one allows the OC0A pin to toggle on Compare Matches if the WGM02
bit is set. This option is not available for the OC0B pin (See Table 11-4 on page 70). The actual OC0x value will only be
visible on the port pin if the data direction for the port pin is set as output. The PWM waveform is generated by clearing
(or setting) the OC0x Register at the Compare Match between OCR0x and TCNT0 when the counter increments, and
setting (or clearing) the OC0x Register at Compare Match between OCR0x and TCNT0 when the counter decrements.
The PWM frequency for the output when using phase correct PWM can be calculated by the following equation:
The N variable represents the prescale factor (1, 8, 64, 256, or 1024).
The extreme values for the OCR0x Register represent special cases when generating a PWM waveform output in the
phase correct PWM mode. If the OCR0x is set equal to BOTTOM, the output will be continuously low and if set equal to
TOVn Interrupt Flag Set
OCnx Interrupt Flag Set
1
2
3
TCNTn
Period
OCnx
OCxn
(COMnx[1:0] = 2)
(COMnx[1:0] = 3)
OCRnx Update
f
OCnxPCPWM
f
clk_I/O
2
N
TOP
--------------------------------
=
相關(guān)PDF資料
PDF描述
AT32UC3A1128 AVR32 32-Bit Microcontroller
AT32UC3A1256 AVR32 32-Bit Microcontroller
AT32UC3A1512 AVR32 32-Bit Microcontroller
AT32UC3B0128 32-Bit Microcontroller
AT32UC3B0256 32-Bit Microcontroller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AT32UC3A0512_08 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:AVR32 32-Bit Microcontroller
AT32UC3A0512_09 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:AVR 32 32-Bit Microcontroller
AT32UC3A0512_1 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:AVR32 32-Bit Microcontroller
AT32UC3A0512-ALTES 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:AVR32 32-Bit Microcontroller
AT32UC3A0512-ALTR 功能描述:MCU AVR32 512K FLASH 144LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - 微控制器, 系列:AVR®32 UC3 A0 標(biāo)準(zhǔn)包裝:1,500 系列:AVR® ATtiny 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C,LIN,SPI,UART/USART,USI 外圍設(shè)備:欠壓檢測(cè)/復(fù)位,POR,PWM,溫度傳感器,WDT 輸入/輸出數(shù):16 程序存儲(chǔ)器容量:8KB(4K x 16) 程序存儲(chǔ)器類(lèi)型:閃存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 11x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:20-SOIC(0.295",7.50mm 寬) 包裝:帶卷 (TR)