參數(shù)資料
型號(hào): AT80251G2D-SLSUL
廠商: Atmel
文件頁(yè)數(shù): 29/77頁(yè)
文件大?。?/td> 0K
描述: IC 8051 MCU ROMLESS 44PLCC
標(biāo)準(zhǔn)包裝: 972
系列: 8x251
核心處理器: C251
芯體尺寸: 8/16-位
速度: 16MHz
連通性: EBI/EMI,I²C,Microwire,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器類(lèi)型: ROMless
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
35
AT/TSC8x251G2D
4135F–8051–11/06
Table 28.
Summary of Exchange, Push and Pop Instructions
Notes: 1. A shaded cell denotes an instruction in the C51 Architecture.
2. If this instruction addresses an I/O Port (Px, x = 0-3), add 1 to the number of states.
Add 2 if it addresses a Peripheral SFR.
3. If this instruction addresses an I/O Port (Px, x = 0-3), add 2 to the number of states.
Add 3 if it addresses a Peripheral SFR.
Exchange bytesXCH A, <src>(A)
src opnd
Exchange DigitXCHD A, <src>(A)3:0 src opnd3:0
PushPUSH <src>(SP)
← (SP) +1; ((SP)) ← src opnd;
(SP)
← (SP) + size (src opnd) - 1
PopPOP <dest>(SP)
← (SP) - size (dest opnd) + 1;
dest opnd
← ((SP)); (SP) ← (SP) -1
Mnemonic
<dest>,
<src>(1)
Comments
Binary Mode
Source Mode
Bytes
States
Bytes
States
XCH
A, Rn
ACC and register
1
3
2
4
A, dir8
ACC and direct address (on-chip
RAM or SFR)
23(3)
A, at Ri
ACC and indirect address
1
4
2
5
XCHD
A, at Ri
ACC low nibble and indirect address
(256 bytes)
14
2
5
PUSH
dir8
Push direct address onto stack
2
2(2)
22(2)
#data
Push immediate data onto stack
4
3
#data16
Push 16-bit immediate data onto
stack
55
4
5
Rm
Push byte register onto stack
3
4
2
3
WRj
Push word register onto stack
3
5
2
4
DRk
Push double word register onto
stack
39
2
8
POP
dir8
Pop direct address (on-chip RAM or
SFR) from stack
23(2)
Rm
Pop byte register from stack
3
2
WRj
Pop word register from stack
3
5
2
4
DRk
Pop double word register from stack
3
9
2
8
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