參數(shù)資料
型號(hào): AT80C51RD2-RLTUM
廠商: Atmel
文件頁數(shù): 25/81頁
文件大?。?/td> 0K
描述: IC 8051 MCU 5V SPI 20MHZ 44-VQFP
標(biāo)準(zhǔn)包裝: 800
系列: 80C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器類型: ROMless
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LQFP
包裝: 托盤
31
4113D–8051–01/09
AT80C51RD2
Figure 10-4. PCA Compare Mode and PCA Watchdog Timer
Before enabling ECOM bit, CCAPnL and CCAPnH should be set with a non zero value, other-
wise an unwanted match could happen. Writing to CCAPnH will set the ECOM bit.
Once ECOM set, writing CCAPnL will clear ECOM so that an unwanted match doesn’t occur
while modifying the compare value. Writing to CCAPnH will set ECOM. For this reason, user
software should write CCAPnL first, and then CCAPnH. Of course, the ECOM bit can still be
controlled by accessing to CCAPMn register.
10.3
High-speed Output Mode
In this mode, the CEX output (on port 1) associated with the PCA module will toggle each time a
match occurs between the PCA counter and the module's capture registers. To activate this
mode the TOG, MAT, and ECOM bits in the module's CCAPMn SFR must be set (see
A prior write must be done to CCAPnL and CCAPnH before writing the ECOMn bit.
CH
CL
CCAPnH
CCAPnL
ECOMn
CCAPMn, n = 0 to 4
0xDA to 0xDE
CAPNn MATn TOGn PWMn ECCFn
CAPPn
16 bit comparator
Match
CCON
0xD8
PCA IT
Enable
PCA counter/timer
RESET *
CIDL
CPS1 CPS0
ECF
CMOD
0xD9
WDTE
Reset
Write to
CCAPnL
Write to
CCAPnH
CF
CCF2 CCF1 CCF0
CR
CCF3
CCF4
10
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