RCON: RESET CONTROL REGISTER
參數(shù)資料
型號： AT89C51AC3-SLSIM
廠商： Atmel
文件頁數(shù)： 120/140頁
文件大?。?/td> 0K
描述： IC 8051 MCU FLASH 64K 44PLCC
標(biāo)準(zhǔn)包裝： 27
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 60MHz
連通性： UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 36
程序存儲器容量： 64KB（64K x 8）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 管件
dsPIC33FJXXXGPX06/X08/X10
DS70286C-page 78
2009 Microchip Technology Inc.
REGISTER 6-1:
RCON: RESET CONTROL REGISTER(1)
R/W-0
U-0
R/W-0
TRAPR
IOPUWR
—
—VREGS
bit 15
bit 8
R/W-0
R/W-1
EXTR
SWR
SWDTEN(2)
WDTO
SLEEP
IDLE
BOR
POR
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
TRAPR: Trap Reset Flag bit
1
= A Trap Conflict Reset has occurred
0
= A Trap Conflict Reset has not occurred
bit 14
IOPUWR: Illegal Opcode or Uninitialized W Access Reset Flag bit
1
= An illegal opcode detection, an illegal address mode or uninitialized W register used as an
Address Pointer caused a Reset
0
= An illegal opcode or uninitialized W Reset has not occurred
bit 13-9
Unimplemented: Read as ‘0’
bit 8
VREGS: Voltage Regulator Standby During Sleep bit
1
= Voltage regulator is active during Sleep
0
= Voltage regulator goes into Standby mode during Sleep
bit 7
EXTR: External Reset (MCLR) Pin bit
1
= A Master Clear (pin) Reset has occurred
0
= A Master Clear (pin) Reset has not occurred
bit 6
SWR: Software Reset (Instruction) Flag bit
1
= A RESET instruction has been executed
0
= A RESET instruction has not been executed
bit 5
SWDTEN: Software Enable/Disable of WDT bit(2)
1
= WDT is enabled
0
= WDT is disabled
bit 4
WDTO: Watchdog Timer Time-out Flag bit
1
= WDT time-out has occurred
0
= WDT time-out has not occurred
bit 3
SLEEP: Wake-up from Sleep Flag bit
1
= Device has been in Sleep mode
0
= Device has not been in Sleep mode
bit 2
IDLE: Wake-up from Idle Flag bit
1
= Device was in Idle mode
0
= Device was not in Idle mode
bit 1
BOR: Brown-out Reset Flag bit
1
= A Brown-out Reset has occurred
0
= A Brown-out Reset has not occurred
bit 0
POR: Power-on Reset Flag bit
1
= A Power-on Reset has occurred
0
= A Power-on Reset has not occurred
Note 1: All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
2: If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
SWDTEN bit setting.
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