參數(shù)資料
型號(hào): AT89C51AC3-SLSIM
廠商: Atmel
文件頁數(shù): 62/140頁
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 64K 44PLCC
標(biāo)準(zhǔn)包裝: 27
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 60MHz
連通性: UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 36
程序存儲(chǔ)器容量: 64KB(64K x 8)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 2.25K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
dsPIC33FJXXXGPX06/X08/X10
DS70286C-page 26
2009 Microchip Technology Inc.
REGISTER 3-2:
CORCON: CORE CONTROL REGISTER
U-0
R/W-0
R-0
—US
EDT(1)
DL<2:0>
bit 15
bit 8
R/W-0
R/W-1
R/W-0
R/C-0
R/W-0
SATA
SATB
SATDW
ACCSAT
IPL3(2)
PSV
RND
IF
bit 7
bit 0
Legend:
C = Clear only bit
R = Readable bit
W = Writable bit
-n = Value at POR
‘1’ = Bit is set
0’ = Bit is cleared
‘x = Bit is unknown
U = Unimplemented bit, read as ‘0’
bit 15-13
Unimplemented: Read as ‘0’
bit 12
US: DSP Multiply Unsigned/Signed Control bit
1
= DSP engine multiplies are unsigned
0
= DSP engine multiplies are signed
bit 11
EDT: Early DO Loop Termination Control bit(1)
1
= Terminate executing DO loop at end of current loop iteration
0
= No effect
bit 10-8
DL<2:0>: DO Loop Nesting Level Status bits
111
= 7 DO loops active
001
= 1 DO loop active
000
= 0 DO loops active
bit 7
SATA: AccA Saturation Enable bit
1
= Accumulator A saturation enabled
0
bit 6
SATB: AccB Saturation Enable bit
1
= Accumulator B saturation enabled
0
= Accumulator B saturation disabled
bit 5
SATDW: Data Space Write from DSP Engine Saturation Enable bit
1
= Data space write saturation enabled
0
= Data space write saturation disabled
bit 4
ACCSAT: Accumulator Saturation Mode Select bit
1
= 9.31 saturation (super saturation)
0
= 1.31 saturation (normal saturation)
bit 3
IPL3: CPU Interrupt Priority Level Status bit 3(2)
1
= CPU interrupt priority level is greater than 7
0
= CPU interrupt priority level is 7 or less
bit 2
PSV: Program Space Visibility in Data Space Enable bit
1
= Program space visible in data space
0
= Program space not visible in data space
bit 1
RND: Rounding Mode Select bit
1
= Biased (conventional) rounding enabled
0
= Unbiased (convergent) rounding enabled
bit 0
IF: Integer or Fractional Multiplier Mode Select bit
1
= Integer mode enabled for DSP multiply ops
0
= Fractional mode enabled for DSP multiply ops
Note 1: This bit will always read as ‘0’.
2: The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU interrupt priority level.
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