參數(shù)資料
型號： AT89C51ID2-SLRIM
廠商： Atmel
文件頁數(shù)： 10/157頁
文件大?。?/td> 0K
描述： IC MCU FLASH 8051 64K 5V 44-PLCC
標(biāo)準(zhǔn)包裝： 1
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 60MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 34
程序存儲器容量： 64KB（64K x 8）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 剪切帶 (CT)
其它名稱： AT89C51ID2SLRIMCT
107
AT89C51ID2
4289C–8051–11/05
Hardware Watchdog
Timer
The WDT is intended as a recovery method in situations where the CPU may be sub-
jected to software upset. The WDT consists of a 14-bit counter and the WatchDog Timer
ReSeT (WDTRST) SFR. The WDT is by default disabled from exiting reset. To enable
the WDT, user must write 01EH and 0E1H in sequence to the WDTRST, SFR location
0A6H. When WDT is enabled, it will increment every machine cycle while the oscillator
is running and there is no way to disable the WDT except through reset (either hardware
reset or WDT overflow reset). When WDT overflows, it will drive an output RESET HIGH
pulse at the RST-pin.
Using the WDT
To enable the WDT, user must write 01EH and 0E1H in sequence to the WDTRST, SFR
location 0A6H. When WDT is enabled, the user needs to service it by writing to 01EH
and 0E1H to WDTRST to avoid WDT overflow. The 14-bit counter overflows when it
reaches 16383 (3FFFH) and this will reset the device. When WDT is enabled, it will
increment every machine cycle while the oscillator is running. This means the user must
reset the WDT at least every 16383 machine cycle. To reset the WDT the user must
write 01EH and 0E1H to WDTRST. WDTRST is a write only register. The WDT counter
cannot be read or written. When WDT overflows, it will generate an output RESET pulse
at the RST-pin. The RESET pulse duration is 96 x T
CLK PERIPH, where TCLK PERIPH= 1/FCLK
PERIPH. To make the best use of the WDT, it should be serviced in those sections of code
that will periodically be executed within the time required to prevent a WDT reset.
To have a more powerful WDT, a 2
7 counter has been added to extend the Time-out
capability, ranking from 16ms to 2s @ F
OSCA = 12MHz. To manage this feature, refer to
WDTPRG register description, Table 82.
Table 82. WDTRST Register
WDTRST - Watchdog Reset Register (0A6h)
Reset Value = XXXX XXXXb
Write only, this SFR is used to reset/enable the WDT by writing 01EH then 0E1H in
sequence.
76
543
210
--
----
--
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AT89C51ID2-SLRUM 功能描述:8位微控制器 -MCU C51ID2 64K FLASH TWI 32KHz 5V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
AT89C51ID2-SLSIM 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Flash Microcontroller
AT89C51ID2-SLSUM 功能描述:8位微控制器 -MCU 64K FLASH 32KHz 3.5-5V Ind. RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
AT89C51ID2-SMSIM 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Flash Microcontroller
AT89C51ID2-UM 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Flash Microcontroller
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