參數資料
型號: AT89C51ID2-SLRUM
廠商: Atmel
文件頁數: 104/157頁
文件大?。?/td> 0K
描述: IC 8051 MCU 64K FLASH 44-PLCC
產品培訓模塊: MCU Product Line Introduction
標準包裝: 500
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 60MHz
連通性: I²C,SPI,UART/USART
外圍設備: POR,PWM,WDT
輸入/輸出數: 34
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 標準包裝
其它名稱: AT89C51ID2-SLRUMDKR
50
AT89C51ID2
4289C–8051–11/05
Figure 18. PCA High Speed Output Mode
Before enabling ECOM bit, CCAPnL and CCAPnH should be set with a non zero value,
otherwise an unwanted match could happen.
Once ECOM set, writing CCAPnL will clear ECOM so that an unwanted match doesn’t
occur while modifying the compare value. Writing to CCAPnH will set ECOM. For this
reason, user software should write CCAPnL first, and then CCAPnH. Of course, the
ECOM bit can still be controlled by accessing to CCAPMn register.
Pulse Width Modulator
Mode
All of the PCA modules can be used as PWM outputs. Figure 19 shows the PWM func-
tion. The frequency of the output depends on the source for the PCA timer. All of the
modules will have the same frequency of output because they all share the PCA timer.
The duty cycle of each module is independently variable using the module's capture
register CCAPLn. When the value of the PCA CL SFR is less than the value in the mod-
ule's CCAPLn SFR the output will be low, when it is equal to or greater than the output
will be high. When CL overflows from FF to 00, CCAPLn is reloaded with the value in
CCAPHn. This allows updating the PWM without glitches. The PWM and ECOM bits in
the module's CCAPMn register must be set to enable the PWM mode.
CH
CL
CCAPnH
CCAPnL
ECO Mn
CCAPMn, n = 0 to 4
0xDA to 0xDE
CAPNn MATn TOGn PWMn ECCFn
CAPPn
16 bit comparator
Match
CF
CR
CCO N
0xD8
CCF4 CCF3
CCF2
CCF1
CCF0
PCA IT
Enable
CEXn
PCA counter/timer
Write to
CCAPnH
Reset
Write to
CCA PnL
1
0
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