參數(shù)資料
型號: AT89C51SND1C-7HTUL
廠商: Atmel
文件頁數(shù): 41/42頁
文件大?。?/td> 0K
描述: IC MCU 64KB FLASH MEM 81-CBGA
標(biāo)準(zhǔn)包裝: 250
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,IDE/ATAPI,MMC,SPI,UART/USART,USB
外圍設(shè)備: 音頻,I²S,MP3,PCM,POR,WDT
輸入/輸出數(shù): 44
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
RAM 容量: 2.25K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.3 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 2x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 81-CBGA
包裝: 托盤
8
4109LS–8051–02/08
AT8xC51SND1C
Table 7. UART Signal Description
Table 8. SPI Controller Signal Description
Table 9. TWI Controller Signal Description
Table 10. A/D Converter Signal Description
Signal
Name
Type
Description
Alternate
Function
RXD
I/O
Receive Serial Data
RXD sends and receives data in serial I/O mode 0 and receives data in
serial I/O modes 1, 2 and 3.
P3.0
TXD
O
Transmit Serial Data
TXD outputs the shift clock in serial I/O mode 0 and transmits data in
serial I/O modes 1, 2 and 3.
P3.1
Signal
Name
Type
Description
Alternate
Function
MISO
I/O
SPI Master Input Slave Output Data Line
When in master mode, MISO receives data from the slave peripheral.
When in slave mode, MISO outputs data to the master controller.
P4.0
MOSI
I/O
SPI Master Output Slave Input Data Line
When in master mode, MOSI outputs data to the slave peripheral.
When in slave mode, MOSI receives data from the master controller.
P4.1
SCK
I/O
SPI Clock Line
When in master mode, SCK outputs clock to the slave peripheral. When
in slave mode, SCK receives clock from the master controller.
P4.2
SS
I
SPI Slave Select Line
When in controlled slave mode, SS enables the slave mode.
P4.3
Signal
Name
Type
Description
Alternate
Function
SCL
I/O
TWI Serial Clock
When TWI controller is in master mode, SCL outputs the serial clock to
the slave peripherals. When TWI controller is in slave mode, SCL
receives clock from the master controller.
P1.6
SDA
I/O
TWI Serial Data
SDA is the bidirectional Two Wire data line.
P1.7
Signal
Name
Type
Description
Alternate
Function
AIN1:0
I
A/D Converter Analog Inputs
-
AREFP
I
Analog Positive Voltage Reference Input
-
AREFN
I
Analog Negative Voltage Reference Input
This pin is internally connected to AVSS.
-
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