參數(shù)資料
型號: AT89LP4052-16PU
廠商: Atmel
文件頁數(shù): 60/94頁
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 4K 20DIP
標準包裝: 18
系列: 89LP
核心處理器: 8051
芯體尺寸: 8-位
速度: 16MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 15
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-DIP(0.300",7.62mm)
包裝: 管件
63
3547J–MICRO–10/09
AT89LP2052/LP4052
23.4.5
Load Code Page Buffer
Function:
Loads 1 page (1 to 32 bytes) of data into the temporary page buffer but does not start
programming.
Use for interruptible loads or loading non-contiguous bytes to a page.
The byte address (offset in page) is initialized to bits [4:0] of the low address byte. One byte
of data is loaded from P1 for the current address by the positive edge of a XTAL1 pulse. The
internal address is incremented by one on the negative edge of the XTAL1 pulse. The
address will wrap around to the 1st byte of the page when incremented past 31, however
previously loaded bytes should not be re-loaded.
The Load Page Buffer command needs to be followed by a write command as the internal
buffer is not cleared until either the next write has completed or the programming session
ends.
Clears Bit 3 of the status byte to signal that the buffer contains data.
Usage:
1.
Bring CS (P3.2) low.
2.
Drive P1 to AAh and pulse XTAL1 high.
3.
Drive P1 to 51h and pulse XTAL1 high.
4.
Drive P1 to 00h and pulse XTAL1 high.
5.
Drive P1 with bits [4:0] of address and pulse XTAL1 high.
6.
To load data bytes, drive data on P1 and pulse XTAL1 high to load one byte and incre-
ment to the next address. Repeat for additional bytes. Only 1-32 bytes may be
programmed at one time, including any bytes loaded by a previous load page buffer
command. Bytes should not be loaded more than once.
7.
Bring CS high.
Figure 23-9. Load Page Buffer Sequence
Note:
The waveform on this page is not to scale.
AAh
51h
00h
000bbbbb
DIN 0
CS
XTAL1
P1
DIN 1
DIN n
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