參數(shù)資料
型號: AT89LP4052-16XU
廠商: Atmel
文件頁數(shù): 18/94頁
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 4K 20TSSOP
標準包裝: 74
系列: 89LP
核心處理器: 8051
芯體尺寸: 8-位
速度: 16MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 15
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
包裝: 管件
25
3547J–MICRO–10/09
AT89LP2052/LP4052
a control bit in the Special Function Register TCON. GATE is in TMOD. The 13-bit register con-
sists of all 8 bits of TH1 and the lower 5 bits of TL1. The upper 3 bits of TL1 are indeterminate
and should be ignored. Setting the run flag (TR1) does not clear the registers. See Figure 16-1.
Figure 16-1. Timer/Counter 1 Mode 0: Variable Width Counter
Mode 0 operation is the same for Timer 0 as for Timer 1, except that TR0, TF0 and INT0 replace
the corresponding Timer 1 signals in Figure 16-1. There are two different GATE bits, one for
Timer 1 (TMOD.7) and one for Timer 0 (TMOD.3).
16.2
Mode 1
In Mode 1 the Timers are configured for 16-bit auto-reload. The Timer register is run with all 16
bits. The 16-bit reload value is stored in the high and low reload registers (RH1/RL1). The clock
is applied to the combined high and low timer registers (TH1/TL1). As clock pulses are received,
the timer counts up: 0000H, 0001H, 0002H, etc. An overflow occurs on the FFFFH-to-0000H
transition, upon which the timer register is reloaded with the value from RH1/RL1 and the over-
flow flag bit in TCON is set. See Figure 16-2. The reload registers default to 0000H, which gives
the full 16-bit timer period compatible with the standard 8051. Mode 1 operation is the same for
Timer/Counter 0.
Figure 16-2. Timer/Counter 1 Mode 1: 16-bit Auto-Reload
OSC
T1 Pin
TR1
GATE
INT1 Pin
TL1
(8 Bits)
Control
Interrupt
C/T = 0
C/T = 1
PSC1
TH1
(8 Bits)
TF1
OSC
T1 Pin
TR1
GATE
INT1 Pin
TL1
(8 Bits)
Control
Interrupt
C/T = 0
C/T =1
TH1
(8 Bits)
TF1
RL1
(8 Bits)
RH1
(8 Bits)
Reload
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