參數(shù)資料
型號: AT89S8253-24AU
廠商: Atmel
文件頁數(shù): 33/60頁
文件大?。?/td> 0K
描述: IC MCU 12K FLASH 24MHZ 44-TQFP
產(chǎn)品培訓模塊: MCU Product Line Introduction
標準包裝: 160
系列: 89S
核心處理器: 8051
芯體尺寸: 8-位
速度: 24MHz
連通性: SPI,UART/USART
外圍設備: POR,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 12KB(12K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
產(chǎn)品目錄頁面: 616 (CN2011-ZH PDF)
39
3286P–MICRO–3/10
AT89S8253
21. Programming Interface
Every code byte in the Flash and EEPROM arrays can be written, and the entire array can be
erased, by using the appropriate combination of control signals. The write operation cycle is self-
timed and once initiated, will automatically time itself to completion.
Most worldwide major programming vendors offer support for the Atmel AT89 microcontroller
series. Please contact your local programming vendor for the appropriate software revision.
22. Serial Downloading
Both the code and data memory arrays can be programmed using the serial SPI bus while RST
is pulled to V
CC. The serial interface consists of pins SCK, MOSI (input) and MISO (output). After
RST is set high, the Programming Enable instruction must be executed first before other opera-
tions can be executed.
The Chip Erase operation turns the content of every memory location in both the Code and Data
arrays into FFH.
The code and data memory arrays have separate address spaces:
0000H to 2FFFH for code memory and 000H to 7FFH for data memory.
Either an external system clock is supplied at pin XTAL1 or a crystal needs to be connected
across pins XTAL1 and XTAL2. The maximum serial clock (SCK) frequency should be less than
1/16 of the crystal frequency. With a 24 MHz oscillator clock, the maximum SCK frequency is
1.5 MHz.
23. Serial Programming Algorithm
To program and verify the AT89S8253 in the serial programming mode, the following sequence
is recommended:
1.
Power-up sequence:
a.
Apply power between VCC and GND pins.
b.
Set RST pin to “H”.
If a crystal is not connected across pins XTAL1 and XTAL2, apply a 3 MHz to 12 MHz clock to
XTAL1 pin and wait for at least 10 ms with RST pin high and P1.7 (SCK) low.
2.
Enable serial programming by sending the Programming Enable serial instruction to pin
MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs to be less
than the CPU clock at XTAL1 divided by 16.
3.
The code or data array is programmed one byte or one page at a time by supplying the
address and data together with the appropriate Write instruction. The write cycle is self-
timed and typically takes less than 4.0 ms at 5V.
4.
Any memory location can be verified by using the Read instruction which returns the
content at the selected address at serial output MISO/P1.6.
5.
At the end of a programming session, RST can be set low to commence normal
operation.
Power-off sequence (if needed):
1.
Set XTAL1 to “L” (if a crystal is not used).
2.
Set RST to “L”.
3.
Turn V
CC power off.
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