參數(shù)資料
型號: AT90S4433-8AC
廠商: Atmel
文件頁數(shù): 62/126頁
文件大小: 0K
描述: IC MCU 4K FLSH 8MHZ A/D 32TQFP
標(biāo)準(zhǔn)包裝: 250
系列: AVR® 90S
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 20
程序存儲器容量: 4KB(2K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 256 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x10b
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 32-TQFP
包裝: 托盤
40
AT90S/LS4433
1042H–AVR–04/03
the TEMP Register. Consequently, the Low Byte TCNT1L must be accessed first for a
full 16-bit register read operation.
The Timer/Counter1 is realized as an up or up/down (in PWM mode) counter with read
and write access. If Timer/Counter1 is written to and a clock source is selected, the
Timer/Counter1 continues counting in the timer clock cycle after it is preset with the writ-
ten value.
Timer/Counter1 Output
Compare Register – OCR1H
and OCR1L
The Output Compare Register is a 16-bit read/write register.
The Timer/Counter1 Output Compare Register contains the data to be continuously
compared with Timer/Counter1. Actions on compare matches are specified in the
Timer/Counter1 Control and Status Register.
Since the Output Compare Register (OCR1) is a 16-bit register, a temporary register
TEMP is used when OCR1 is written to ensure that both bytes are updated simulta-
neously. When the CPU writes the High Byte, OCR1H, the data is temporarily stored in
the TEMP Register. When the CPU writes the Low Byte, OCR1L, the TEMP Register is
simultaneously written to OCR1H. Consequently, the High Byte OCR1H must be written
first for a full 16-bit register write operation.
The TEMP Register is also used when accessing TCNT1 and ICR1. If the main program
and interrupt routines perform access to registers using TEMP, interrupts must be dis-
abled during access from the main program.
Bit
15141312
11
10
9
8
$2B ($4B)
MSB
OCR1H
$2A ($4A)
LSB
OCR1L
76
543
210
Read/Write
R/W
R/WR/W
Initial Value
0
00
000
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