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參數(shù)資料
| 型號： | AT91M42800A-33CJ-999 |
| 廠商： | Atmel |
| 文件頁數(shù)： | 2/27頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 32BIT RISC 144BGA |
| 標準包裝： | 1 |
| 系列： | AT91 |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 33MHz |
| 連通性： | EBI/EMI，SPI，UART/USART |
| 外圍設備： | POR，WDT |
| 輸入/輸出數(shù)： | 54 |
| 程序存儲器類型： | ROMless |
| RAM 容量： | 8K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 3.6 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 144-LFBGA |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | AT91M42800A-33CJ-999CT |
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10
1779ES–ATARM–14-Apr-06
AT91M42800A
interrupt request to the ARM7TDMI. It integrates an 8-level priority controller, and, using the
Auto-vectoring feature, reduces the interrupt latency time.
The Parallel Input/Output Controllers (PIOA, PIOB) controls up to 54 I/O lines. It enables the
user to select specific pins for on-chip peripheral input/output functions, and general-purpose
input/output signal pins. The PIO controllers can be programmed to detect an interrupt on a sig-
nal change from each line.
There are three embedded system timers. The Real-time Timer (RTT) counts elapsed seconds
and can generate periodic or programmed interrupts. The Period Interval Timer (PIT) can be
used as a user-programmable time-base, and can generate periodic ticks. The Watchdog (WD)
can be used to prevent system lock-up if the software becomes trapped in a deadlock.
The Special Function (SF) module integrates the Chip ID and the Reset Status registers.
5.2.2
User Peripherals
Two USARTs, independently configurable, enable communication at a high baud rate in syn-
chronous or asynchronous mode. The format includes start, stop and parity bits and up to 9 data
bits. Each USART also features a Time-out and a Time-guard register, facilitating the use of the
two dedicated Peripheral Data Controller (PDC) channels.
The two 3-channel, 16-bit Timer/Counters (TC) are highly-programmable and support capture or
waveform modes. Each TC channel can be programmed to measure or generate different kinds
of waves, and can detect and control two input/output signals. Each TC also has three external
clock signals.
Two independently configurable SPIs provide communication with external devices in master or
slave mode. Each has four external chip selects which can be connected to up to 15 devices.
The data length is programmable, from 8- to 16-bit.
6.
Associated Documentation
Table 6-1.
Associated Documentation
Product
Information
Document Title
AT91M42800A
Internal architecture of processor
ARM/Thumb instruction sets
Embedded in-circuit-emulator
ARM7TDMI (Thumb) Datasheet
External memory interface mapping
Peripheral operations
Peripheral user interfaces
AT91M42800A Datasheet
DC characteristics
Power consumption
Thermal and reliability considerations
AC characteristics
AT91M42800A Electrical Characteristics
Product overview
Ordering information
Packaging information
Soldering profile
AT91M42800A Summary Datasheet (this document)
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