20
ATF1508AS(L)
0784P–PLD–7/05
Notes:
1. See ordering information for valid part numbers.
2. The t
RPA parameter must be added to the tLAD, tLAC,tTIC, tACL, and tSEXP parameters for macrocells running in the reduced-
power mode.
t
OD2
Output Buffer and Pad Delay
(Slow slew rate = OFF;
VCCIO = 3.3V; CL = 35 pF)
2.5
2.0
5
6
7
ns
t
OD3
Output Buffer and Pad Delay
(Slow slew rate = ON;
VCCIO = 5V or 3.3V; CL = 35 pF)
55.5
8
10
12
ns
t
ZX1
Output Buffer Enable Delay
(Slow slew rate = OFF;
VCCIO = 5.0V; CL = 35 pF)
4.0
5.0
7
9
10
ns
t
ZX2
Output Buffer Enable Delay
(Slow slew rate = OFF;
VCCIO = 3.3V; CL = 35 pF)
4.5
5.5
7
9
10
ns
t
ZX3
Output Buffer Enable Delay
(Slow slew rate = ON;
VCCIO = 5.0V/3.3V; CL = 35 pF)
9
10
11
12
ns
t
XZ
Output Buffer Disable Delay
(CL = 5 pF)
4
567
8
ns
tSU
Register Setup Time
3
2
4
5
6
ns
t
H
Register Hold Time
2
3
4
5
6
ns
tFSU
Register Setup Time of Fast
Input
33
2
3
ns
t
FH
Register Hold Time of Fast
Input
0.5
2
2.5
ns
t
RD
Register Delay
1
2
1
2
ns
t
COMB
Combinatorial Delay
1
2
1
2
ns
tIC
Array Clock Delay
3
5
6
7
8
ns
t
EN
Register Enable Time
3
5
6
7
8
ns
t
GLOB
Global Control Delay
1
ns
tPRE
Register Preset Time
2
3
4
5
6
ns
t
CLR
Register Clear Time
2
3
4
5
6
ns
t
UIM
Switch Matrix Delay
1
2
ns
tRPA
Reduced-power Adder(2)
10
11
13
14
15
ns
AC Characteristics (Continued)(1)
Symbol
Parameter
-7
-10
-15
-20
-25
Units
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max