This section discusses the Atmel
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� ATMEGA128A-ANR
寤犲晢锛� Atmel
鏂囦欢闋佹暩(sh霉)锛� 376/386闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC MCU AVR 128K FLASH 64TQFP
鐢�(ch菐n)鍝佸煿瑷撴ā濉婏細 megaAVR Introduction
妯欐簴鍖呰锛� 1,000
绯诲垪锛� AVR® ATmega
鏍稿績铏曠悊鍣細 AVR
鑺珨灏哄锛� 8-浣�
閫熷害锛� 16MHz
閫i€氭€э細 EBI/EMI锛孖²C锛孲PI锛孶ART/USART
澶栧湇瑷倷锛� 娆犲妾㈡脯/寰╀綅锛孭OR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁�(sh霉)锛� 53
绋嬪簭瀛樺劜鍣ㄥ閲忥細 128KB锛�64K x 16锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
EEPROM 澶у皬锛� 4K x 8
RAM 瀹归噺锛� 4K x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 2.7 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 8x10b
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
宸ヤ綔婧害锛� -40°C ~ 105°C
灏佽/澶栨锛� 64-TQFP
鍖呰锛� 甯跺嵎 (TR)
鍏跺畠鍚嶇ū锛� ATMEGA128A-ANR-ND
ATMEGA128A-ANRTR
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9
8151H鈥揂VR鈥�02/11
ATmega128A
6.
AVR CPU Core
6.1
Introduction
This section discusses the AtmelAVR core architecture in general. The main function of the
CPU core is to ensure correct program execution. The CPU must therefore be able to access
memories, perform calculations, control peripherals and handle interrupts.
6.2
Architectural Overview
Figure 6-1.
Block Diagram of the AVR Architecture
In order to maximize performance and parallelism, the AVR uses a Harvard architecture 鈥� with
separate memories and buses for program and data. Instructions in the program memory are
executed with a single level pipelining. While one instruction is being executed, the next instruc-
tion is pre-fetched from the program memory. This concept enables instructions to be executed
in every clock cycle. The program memory is In-System Reprogrammable Flash memory.
The fast-access Register file contains 32 脳 8-bit general purpose working registers with a single
clock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU) operation. In a typ-
ical ALU operation, two operands are output from the Register file, the operation is executed,
and the result is stored back in the Register file 鈥� in one clock cycle.
Six of the 32 registers can be used as three 16-bit indirect address register pointers for Data
Space addressing 鈥� enabling efficient address calculations. One of the these address pointers
Flash
Program
Memory
Instruction
Register
Instruction
Decoder
Program
Counter
Control Lines
32 x 8
General
Purpose
Registrers
ALU
Status
and Control
I/O Lines
EEPROM
Data Bus 8-bit
Data
SRAM
Direct
Addressing
Indirect
Addressing
Interrupt
Unit
SPI
Unit
Watchdog
Timer
Analog
Comparator
I/O Module 2
I/O Module1
I/O Module n
鐩搁棞PDF璩囨枡
PDF鎻忚堪
VE-B5R-IX-F4 CONVERTER MOD DC/DC 7.5V 75W
VE-B5R-IX-F2 CONVERTER MOD DC/DC 7.5V 75W
VE-B5R-IX-F1 CONVERTER MOD DC/DC 7.5V 75W
AT89C51CC01UA-RLRUM IC 8051 MCU 32K FLASH 44-VQFP
VE-B5R-IW-F4 CONVERTER MOD DC/DC 7.5V 100W
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ATmega128A-AU 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 128K Flash 4K EEPROM 4K SRAM 53 IO Pins RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
ATMEGA128A-AUR 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 128K FLSH-16MHz IND TEMP 5V RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
ATMEGA128A-MN 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 128K Flash 16MHz 105 degree C Green RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
ATMEGA128A-MNR 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 128K Flash 16MHz 105 degree C Green RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
ATmega128A-MU 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 128K Flash 4K EEPROM 4K SRAM 53 IO Pins RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT