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參數(shù)資料
| 型號： | ATR0621P1-7FQY |
| 廠商： | ATMEL CORP |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA100 |
| 封裝： | 9 X 9 MM, 0.80 MM PITCH, ROHS COMPLIANT, LFBGA-100 |
| 文件頁數(shù)： | 18/31頁 |
| 文件大?。?/td> | 477K |
| 代理商： | ATR0621P1-7FQY |
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25
4890C–GPS–10/06
ATR0621
8.
Electrical Characteristics - DC Characteristics
If no additional information is given in column Test Conditions, the values apply to a temperature range from –40°C to +85°C.
No.
Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
1.1
DC supply voltage core
VDD18
1.65
1.8
1.95
V
1.2
DC supply voltage VDDIO
domain(1)
VDDIO
1.65
1.8/3.3
3.6
V
1.3
DC supply voltage USB(2)
VDD_USB
VDDUSB
3.0
3.3
3.6
V
1.4
DC supply voltage backup
domain(3)
VBAT18
1.65
1.8
1.95
V
1.5
DC output voltage VDD18
V
O,18
0VDD18
V
1.6
DC output voltage VDDIO
V
O,IO
0
VDDIO
V
1.7
Low-level input voltage
VDD18 domain
VDD18 = 1.65V to 1.95V
VIL,18
–0.3
0.3
×
VDD18
V
1.8
High-level input voltage
VDD18 domain
VDD18 = 1.65V to 1.95V
V
IH,18
0.7
×
VDD18
VDD18 +
0.3
V
1.9
Schmitt trigger threshold
rising
VDD18 = 1.65V to 1.95V
CLK23
V
th+,CLK23
0.7
×
VDD18
V
1.10
Schmitt trigger threshold
falling
VDD18 = 1.65V to 1.95V
CLK23
Vth-,CLK23
0.3
×
VDD18
V
1.11 Schmitt trigger hysteresis
VDD18 = 1.65V to 1.95V
CLK23
V
hyst,CLK23
0.3
0.55
V
1.12
Schmitt trigger threshold
rising
VDD18 = 1.65V to 1.95V
NRESET
V
th+,NRESET
0.8
1.3
V
1.13
Schmitt trigger threshold
falling
VDD18 = 1.65V to 1.95V
NRESET
V
th-,NRESET
0.46
0.77
V
1.14
Low-level input voltage
VDDIO domain
VDDIO = 1.65V to 3.6V
VIL,IO
–0.3
+0.41
V
1.15
High-level input voltage
VDDIO domain
VDDIO = 1.65V to 3.6V
V
IH,IO
1.46
5.0
V
1.16
Low-level input voltage
VBAT18 domain
VBAT18 = 1.65V to 1.95V
P9, P13,
P22, P31
VIL,BAT
–0.3
+0.41
V
1.17
High-level input voltage
VBAT18 domain
VBAT18 = 1.65V to 1.95V
P9, P13,
P22, P31
VIH,BAT
1.46
5.0
V
1.18 Low-level input voltage USB VDD_USB = 3.0V to 3.6V
DP, DM
VIL,USB
–0.3
+0.8
V
1.19 High-level input voltage USB
VDD_USB = 3.0V to 3.6V,
39
source resistance + 27
external series resistor
DP, DM
VIH,USB
2.0
4.6
V
1.20
Low-level output voltage
VDD18 domain
IOL = 1.5 mA, VDD18 = 1.65V
VOL,18
0.4
V
1.21
High-level output voltage
VDD18 domain
IOH = –1.5 mA,
VDD18 = 1.65V
V
OH,18
VDD18 –
0.45
V
1.22
Low-level output voltage
VDDIO domain
IOL = 1.5 mA, VDDIO = 3.0V
VOL,IO
0.4
V
1.23
High-level output voltage
VDDIO domain
I
OH = –1.5 mA,
VDDIO = 3.0V
V
OH,IO
VDDIO –
0.5
V
Notes:
1. VDDIO is the supply voltage for the following GPIO-pins: P1, P2, P8, P12, P14, P16, P17, P18, P19, P20, P21, P23, P24,
P25, P26, P27 and P29
2. Values defined for operating the USB interface. Otherwise VDD_USB may be connected to ground
3. Supply voltage VBAT18 for backup domain is generated internally by the LDOBAT
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