參數(shù)資料
型號: ATSAM3N00AA-MU
廠商: Atmel
文件頁數(shù): 9/60頁
文件大?。?/td> 0K
描述: IC MCU 16KB CORTEX-M3 48-QFN
標準包裝: 260
系列: SAM3N
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 48MHz
連通性: I²C,IrDA,SPI,UART/USART
外圍設備: 欠壓檢測/復位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-VFQFN 裸露焊盤
包裝: 托盤
17
11011BS–ATARM–22-Feb-12
SAM3N Summary
5.
Power Considerations
5.1
Power Supplies
The SAM3N product has several types of power supply pins:
VDDCORE pins: Power the core, including the processor, the embedded memories and the
peripherals. Voltage ranges from 1.62V and 1.95V.
VDDIO pins: Power the Peripherals I/O lines, Backup part, 32 kHz crystal oscillator and
oscillator pads. Voltage ranges from 1.62V and 3.6V
VDDIN pin: Voltage Regulator, ADC and DAC Power Supply. Voltage ranges from 1.8V to
3.6V for the Voltage Regulator
VDDPLL pin: Powers the PLL, the Fast RC and the 3 to 20 MHz oscillators. Voltage ranges
from 1.62V and 1.95V.
5.2
Voltage Regulator
The SAM3N embeds a voltage regulator that is managed by the Supply Controller.
This internal regulator is intended to supply the internal core of SAM3N. It features two different
operating modes:
In Normal mode, the voltage regulator consumes less than 700 A static current and draws
60 mA of output current. Internal adaptive biasing adjusts the regulator quiescent current
depending on the required load current. In Wait Mode quiescent current is only 7 A.
In Backup mode, the voltage regulator consumes less than 1 A while its output (VDDOUT)
is driven internally to GND. The default output voltage is 1.80V and the start-up time to reach
Normal mode is less than100 s.
For adequate input and output power supply decoupling/bypassing, refer to the Voltage Regula-
tor section in the Electrical Characteristics section of the datasheet.
5.3
Typical Powering Schematics
The SAM3N supports a 1.62V-3.6V single supply mode. The internal regulator input connected
to the source and its output feeds VDDCORE. Figure 5-1 shows the power schematics.
As VDDIN powers the voltage regulator and the ADC/DAC, when the user does not want to use
the embedded voltage regulator, it can be disabled by software via the SUPC (note that it is dif-
ferent from Backup mode).
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