參數(shù)資料
型號(hào): ATTINY13A-SSHR
廠商: Atmel
文件頁(yè)數(shù): 3/67頁(yè)
文件大?。?/td> 0K
描述: MCU AVR 1KB FLASH 20MHZ 8SOIC
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
tinyAVR Introduction
標(biāo)準(zhǔn)包裝: 1
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 20MHz
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 6
程序存儲(chǔ)器容量: 1KB(512 x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 64 x 8
RAM 容量: 64 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: ATTINY13A-SSHRDKR
11
8126F–AVR–05/12
ATtiny13A
Figure 4-3.
The X-, Y-, and Z-registers
In the different addressing modes these address registers have functions as fixed displacement,
automatic increment, and automatic decrement (see the instruction set reference for details).
4.5
Stack Pointer
The Stack is mainly used for storing temporary data, for storing local variables and for storing
return addresses after interrupts and subroutine calls. The Stack Pointer Register always points
to the top of the Stack. Note that the Stack is implemented as growing from higher memory loca-
tions to lower memory locations. This implies that a Stack PUSH command decreases the Stack
Pointer.
The Stack Pointer points to the data SRAM Stack area where the Subroutine and Interrupt
Stacks are located. This Stack space in the data SRAM is automaticall defined to the last
address in SRAM during power on reset. The Stack Pointer must be set to point above 0x60.
The Stack Pointer is decremented by one when data is pushed onto the Stack with the PUSH
instruction, and it is decremented by two when the return address is pushed onto the Stack with
subroutine call or interrupt. The Stack Pointer is incremented by one when data is popped from
the Stack with the POP instruction, and it is incremented by two when data is popped from the
Stack with return from subroutine RET or return from interrupt RETI.
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of
bits actually used is implementation dependent. Note that the data space in some implementa-
tions of the AVR architecture is so small that only SPL is needed. In this case, the SPH Register
will not be present.
4.5.1
SPL – Stack Pointer Low
15
XH
XL
0
X-register
70
7
0
R27 (0x1B)
R26 (0x1A)
15
YH
YL
0
Y-register
70
7
0
R29 (0x1D)
R28 (0x1C)
15
ZH
ZL
0
Z-register
7
070
R31 (0x1F)
R30 (0x1E)
Bit
76543210
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SP0
SPL
Read/Write
R/W
Initial Value
10011111
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