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參數(shù)資料
| 型號(hào)： | ATTINY15L-1PU |
| 廠商： | Atmel |
| 文件頁數(shù)： | 16/85頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU AVR 1K FLASH 1.6MHZ 8-DIP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 系列： | AVR® ATtiny |
| 核心處理器： | AVR |
| 芯體尺寸： | 8-位 |
| 速度： | 1.6MHz |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 6 |
| 程序存儲(chǔ)器容量： | 1KB（512 x 16） |
| 程序存儲(chǔ)器類型： | 閃存 |
| EEPROM 大?。?/td> | 64 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 4x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 包裝： | 管件 |
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23
ATtiny15L
1187H–AVR–09/07
Bits 4, 3 – SM1, SM0: Sleep Mode Select Bits 1 and 0
These bits select between the three available sleep modes, as shown in Table 7.
For details, refer to “Sleep Modes” below.
Bit 2 – Res: Reserved Bit
This bit is a reserved bit in the ATtiny15L and always reads as zero.
Bits 1, 0 – ISC01, ISC00: Interrupt Sense Control 0 Bit 1 and Bit 0
The External Interrupt 0 is activated by the external pin INT0 if the SREG I-flag and the
corresponding interrupt mask is set (one). The activity on the external INT0 pin that acti-
vates the interrupt is defined in Table 8:
Note:
1. When changing the ISC10/ISC00 bits, INT0 must be disabled by clearing its Interrupt
Enable bit in the GIMSK Register. Otherwise an interrupt can occur when the bits are
changed.
Sleep Modes
To enter any of the three sleep modes, the SE bit in MCUCR must be set (one) and a
SLEEP instruction must be executed. The SM1 and SM0 bits in the MCUCR Register
select which sleep mode (Idle, ADC Noise Reduction or Power-down) will be activated
by the SLEEP instruction (see Table 7). If an enabled interrupt occurs while the MCU is
in a sleep mode, the MCU wakes up. The MCU is then halted for four cycles, executes
the interrupt routine and resumes execution from the instruction following SLEEP. On
wake-up from Power-down mode on pin change, two instruction cycles are executed
before the Pin Change Interrupt Flag is updated. The contents of the Register File,
SRAM, and I/O memory are unaltered when the device wakes up from sleep. If a reset
occurs during sleep mode, the MCU wakes up and executes from the Reset Vector.
Idle Mode
When the SM1/SM0 bits are “00”, the SLEEP instruction forces the MCU into the Idle
mode, stopping the CPU but allowing the ADC, Analog Comparator, Timer/Counters,
Watchdog and the Interrupt system to continue operating. This enables the MCU to
wake-up from external triggered interrupts as well as internal ones like the Timer Over-
flow Interrupt and Watchdog Reset. If the ADC is enabled, a conversion starts
automatically when this mode is entered. If wake-up from the Analog Comparator inter-
rupt is not required, the Analog Comparator can be powered down by setting the ADC-
bit in the Analog Comparator Control and Status Register (ACSR). This will reduce
power consumption in Idle mode.
Table 7. Sleep Modes
SM1
SM0
Sleep Mode
0
Idle mode
0
1
ADC Noise Reduction mode
1
0
Power-down mode
11
Reserved
Table 8. Interrupt 0 Sense Control
ISC01
ISC00
Description
0
The low level of INT0 generates an interrupt request.
0
1
Any change on INT0 generates an interrupt request
1
0
The falling edge of INT0 generates an interrupt request.
1
The rising edge of INT0 generates an interrupt request.
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| ATTINY15L-1SC | 功能描述:8位微控制器 -MCU AVR 1K FLASH 64B EE ADC 3V 1.6MHZ RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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| ATTINY15L-1SI | 功能描述:8位微控制器 -MCU AVR 1K FLASH 64B EE ADC 3V 1.6MHZ RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ATTINY15L-1SI SL383 | 制造商:Atmel Corporation 功能描述:MCU 8-bit ATtiny AVR RISC 1KB Flash 3.3V/5V 8-Pin SOIC EIAJ T/R |
| ATTINY15L-1SITRSL#QS309 | 制造商:Atmel Corporation 功能描述:ATLATTINY15L-1SITRSL#QS309 PGMD FOR AAPL |
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