Two Independent Output Co" />
參數(shù)資料
型號: ATTINY2313A-SUR
廠商: Atmel
文件頁數(shù): 142/172頁
文件大?。?/td> 0K
描述: MCU AVR 2KB FLASH 20MHZ 20SOIC
產(chǎn)品培訓模塊: tinyAVR Introduction
標準包裝: 1,000
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 18
程序存儲器容量: 2KB(1K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 128 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 帶卷 (TR)
其它名稱: ATTINY2313A-SUR-ND
71
8246B–AVR–09/11
ATtiny2313A/4313
11. 8-bit Timer/Counter0 with PWM
11.1
Features
Two Independent Output Compare Units
Double Buffered Output Compare Registers
Clear Timer on Compare Match (Auto Reload)
Glitch Free, Phase Correct Pulse Width Modulator (PWM)
Variable PWM Period
Frequency Generator
Three Independent Interrupt Sources (TOV0, OCF0A, and OCF0B)
11.2
Overview
Timer/Counter0 is a general purpose 8-bit Timer/Counter module, with two independent Output
Compare Units, and with PWM support. It allows accurate program execution timing (event man-
agement) and wave generation.
A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 11-1. For the actual
placement of I/O pins, refer to “Pinout ATtiny2313A/4313” on page 2. CPU accessible I/O Regis-
ters, including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit
locations are listed in the “Register Description” on page 82.
Figure 11-1. 8-bit Timer/Counter Block Diagram
11.2.1
Registers
The Timer/Counter (TCNT0) and Output Compare Registers (OCR0A and OCR0B) are 8-bit
registers. Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the
Timer Interrupt Flag Register (TIFR). All interrupts are individually masked with the Timer Inter-
rupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T0 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
Clock Select
Timer/Counter
DA
T
A
B
U
S
OCRnA
OCRnB
=
TCNTn
Waveform
Generation
Waveform
Generation
OCFnA
OCFnB
=
Fixed
TOP
Value
Control Logic
= 0
TOP
BOTTOM
Count
Clear
Direction
TOVn
(Int.Req.)
OCFnA
(Int.Req.)
OCFnB
(Int.Req.)
TCCRnA
TCCRnB
Tn
Edge
Detector
( From Prescaler )
clk
Tn
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