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參數(shù)資料
型號: ATTINY24A-SSNR
廠商: Atmel
文件頁數(shù): 39/135頁
文件大?。?/td> 0K
描述: MCU AVR 2KB FLASH 20MHZ 14SOIC
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
tinyAVR Introduction
標(biāo)準(zhǔn)包裝: 1
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 20MHz
連通性: USI
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 12
程序存儲器容量: 2KB(1K x 16)
程序存儲器類型: 閃存
EEPROM 大小: 128 x 8
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: ATTINY24A-SSNRDKR
133
32015G–AVR32–09/09
AT32AP7001
15. External Interrupt Controller (EIC)
Rev: 1.0.0.1
15.1
Features
Dedicated interrupt requests for each interrupt
Individually maskable interrupts
Interrupt on rising or falling edge
Interrupt on high or low level
Maskable NMI interrupt
15.2
Description
The External Interrupt Controller allows 4 pins to be configured as external interrupts. Each pin
has its own interrupt request, and can be individually masked. Each pin can generate an inter-
rupt on rising or falling edge, or high or low level.
The module also masks the NMI_N pin, which generates the NMI interrupt for the CPU.
15.3
Block Diagram
Figure 15-1. External Interrupt Controller block diagram
15.4
Product Dependencies
15.4.1
I/O Lines
The External Interrupt and NMI pins are multiplexed with PIO lines. To act as external interrupts,
these pins must be configured as inputs pins by the PIO controller. It is also possible to trigger
the interrupt by driving these pins from registers in the PIO controller, or another peripheral out-
put connected to the same pin.
Sync
Edge/Level
Detector
Mask
IRQn
EXTINTn
INTn
LEVEL
MODE
IER
IDR
ICR
ISR
IMR
NMI_N
Sync
Mask
NMI_IRQ
NMIC
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