參數(shù)資料
型號: AXDA2700DUV3D
元件分類: 微處理器
英文描述: Microprocessor
中文描述: 微處理器
文件頁數(shù): 29/104頁
文件大小: 1769K
代理商: AXDA2700DUV3D
Chapter 4
Power Management
17
25175E—November 2002
AMD Athlon XP Processor Model 8 Data Sheet
Preliminary Information
Figure 7. Processor Connect State Diagram
Condition
1
CONNECT is deasserted by the Northbridge (for a
previously sent Halt or Stop Grant special cycle).
Processor receives a wake-up event and must cancel
the disconnect request.
Deassert PROCRDY and slow down internal clocks.
Processor wake-up event or CONNECT asserted by
Northbridge.
CLKFWDRST is deasserted by the Northbridge.
Forward clocks start three SYSCLK periods after
CLKFWDRST is deasserted.
2
3
4
5
6
Action
A
B
CLKFWDRST is asserted by the Northbridge.
Issue a Connect special cycle.*
Return internal clocks to full speed and assert
PROCRDY.
Note:
*
The Connect special cycle is only issued after a
processor wake-up event (interrupt or STPCLK#
deassertion) occurs. If the AMD Athlon system
bus is connected so the Northbridge can probe the
processor, a Connect special cycle is not issued at
that time (it is only issued after a subsequent
processor wake-up event).
C
Connect
Disconnect
Pending
Disconnect
Connect
Pending 2
Pending 1
Connect
1
3/A
4/C
5
6/B
2/B
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