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參數(shù)資料
| 型號： | BR1570 |
| 英文描述： | WarpLink Reference Design Platform |
| 中文描述： | WarpLink參考設(shè)計平臺 |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 492K |
| 代理商： | BR1570 |
An important aspect of the backplane design was the selection of the high-speed differential connector from ERNI. The ERmet ZD 8x10
connector is used as a differential board-to-backplane connector rated to support electrical signaling up to 5 Gbps. The ERmet ZD is
compatible with the mechanical characteristics of the ERmet 2 mm-HM specifications as defined in IEC 61076-101.
Line Card
WarpLink Reference Design Platform
6
For More Information On This Product,
Go to: www.freescale.com
One of the cards that reside in the WarpLink Reference Design Platform is the Line Card. It can go into any of the eight slots. In the mesh
topology, all eight slots can be populated with Line Cards. In the fabric topology, slots 1 - 6 can be populated with Line Cards, while slots 7
and 8 must be populated with the Switch Cards. Each Line Card has two WarpLink 2.5 Quad devices on it.
Each WarpLink 2.5 Quad device has four SERDES devices each capable of supporting one full-duplex data link. The parallel side of each
SERDES device is not redundant. Therefore, each SERDES device has only one parallel port. This parallel port of the full-duplex data link
supported by a SERDES device consists of 8 or 10 pins for the parallel transmit interface and 8 or 10 pins for the parallel receive interface.
The serial side, however, is redundant. Therefore, each SERDES device has two serial ports: a primary one and a redundant one. Each of
the serial ports consists of 4 pins: positive-transmit, negative-transmit, positive-receive, and negative-receive.
A Line Card with two WarpLink 2.5 Quad devices, therefore, can support eight full-duplex data links, to be used in either the mesh or fabric
configuration.
The eight serial primary ports provided by the two devices are connected to the eight mesh ports of the slot when the card is inserted. The
mesh ports are then connected to other mesh ports as previously discussed. In the mesh configuration, the primary serial ports are
selected, and data always passes through the two WarpLink devices via their parallel ports and primary serial ports.
The eight serial redundant ports provided by the two devices are connected to the eight fabric-topology line ports of the slot when the card
is inserted. The line ports are then connected to the fabric ports on slot 7 and 8 as previously discussed. In the fabric configuration, the
redundant serial ports are selected, and data always passes through the two WarpLink devices via their parallel ports and redundant serial
ports.
On the parallel side of the WarpLink devices, the HSTL parallel interfaces can be connected to ASICs, FPGAs, or headers to be controlled
and monitored by pattern generators and logic analyzers.
Switch Card
The Switch Card is a combination of a Line Card and a Fabric Card. This card can only go into slots 7 and 8. There are 10 WarpLink devices
on the Switch Card. Two of the 10 devices are used to form the Line Card portion: the devices’ serial primary ports are connected to the
mesh ports and the redundant ports to the line ports. The 32 serial redundant ports of the remaining eight devices are connected to 32
fabric ports of the slot into which the card is inserted. The 32 primary ports of these eight devices are unused.
On the parallel side of the WarpLink devices, the interfaces can be connected to ASICs or FPGAs.
Test Card
The Test Card is a passive card with SMA connectors and 2x10 headers. It does not have any WarpLink or active devices on it.
The card is used to characterize channels from slot to slot. For example, Time Domain Reflectometry (TDR) measurements can be
performed with this Test Card to show via, connector, and backplane trace impedance.
The card can also be used to independently characterize transmitters and receivers operating in the system. When the card is in a slot,
controlled test signals from a signal generator can be fed into the near-end Test Card’s transmit port of a link to characterize the
corresponding receiver of a far-end WarpLink device. Also, signals from a far-end WarpLink transmitter can be measured off the near-end
receive port, through a pair of SMA connectors on the Test Card.
DETAILED DESIGN DESCRIPTIONS
WARPLINK REFERENCE BACKPLANE
The WarpLink Reference Backplane is specifically designed for the Motorola WarpLink 2.5 Quad component. The overall design is
representative of a
typical
backplane used in present-day communications-system chassis. Figure 4
details the overall backplane as well as
component selection and placement on the WarpLink backplane. Figure 5
details the layer stackup of the backplane.
F
Freescale Semiconductor, Inc.
n
.
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