參數(shù)資料
型號(hào)： BU-61703F4-172Y
廠商： DATA DEVICE CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
封裝： 1 X 1 INCH, 0.155 INCH HEIGHT, CERAMIC, FP-72
文件頁(yè)數(shù)： 40/52頁(yè)
文件大小： 367K
代理商： BU-61703F4-172Y
45
DESCRIPTION
Remote Terminal Address Error. Output Signal that reflects the parity combination of the RTAD[4:0] inputs and
RTADP input. A high level indicates odd (correct) parity. A low level indicates even (incorrect) parity.
Note, if RT_AD_ERR is low, then the SSRT will not recognize any valid Command Word received to its own
RT address.
RT_AD_ERR (O)
1
RT Address inputs.
RTAD0 (i) (LSB)
RTAD1 (i)
RTAD2 (i)
RTAD3 (i)
RTAD4 (i) (MSB)
33
41
21
34
35
SIGNAL
RT ADDRESS
Remote Terminal Address Parity. This input signal must provide an odd parity sum with RTAD4-RTAD0 in
order for the RT to respond to non-broadcast commands. That is, there must be an odd number of logic "1"s
from among RTAD-4-RTAD0 and RTADP.
RTADP (I)
40
PIN
RT Address Latch. If RT_AD_LAT is connected to logic "0", then the SSRT is configured to accept a hardwired
RT address from RTAD4-RTAD and RTADP.
If RT_AD_LAT is initially logic "0", and then transitions to logic "1", the values presented on RTAD4-RTAD0 and
RTADP will be latched internally by the SSRT on the rising edge of RT_AD_LAT.
RT_AD_LAT (I)
31
DESCRIPTION
Busy. If this input is asserted low, the Busy bit will be set to logic "1" in the SSRT's Status Word. If the Busy bit
in the status word is logic "1", the SSRT will not transmit any data words, except for a Transmit last command
or Transmit BIT word mode command. For a receive command, if the SSRT is Busy, it will still transfer data
words to the external system (although these transfers may be blocked by means of external logic).
Subsystem Flag. If this input is asserted low, the Subsystem Flag bit will be set in the SSRT's Status Word.
BUSY (I)
SSFLAG (I)
55
32
SIGNAL
RT STATUS WORD INPUTS
Illegal. Input to the SSRT that is sampled after the Command Word transfer. A logic "0" will cause the Message
Error bit in the status response to be set (logic "1"), while a logic "1" on this input will have no effect on the
Message Error bit.
ILLEGAL (I)
62
PIN
Service Request. When this input is logic "0", the Service request bit in the SSRT's status word will be logic
"1". When this input is logic "1", the Service request bit in the SSRT's status word will be logic "0".
SRV_RQST (I)
61
相關(guān)PDF資料
PDF描述
BU-61703F4-172 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
BU-61703F4-182S 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
BU-61703F4-192S 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
BU-61703G4-112Q 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, MQFP72
BU-61703G4-132L 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, MQFP72
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