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參數(shù)資料
| 型號： | BU-65743F8-100 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80 |
| 封裝： | 0.880 INCH, CERAMIC, QFP-80 |
| 文件頁數(shù)： | 44/75頁 |
| 文件大?。?/td> | 532K |
| 代理商： | BU-65743F8-100 |
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49
Data Device Corporation
www.ddc-web.com
BU-65743/65843/65863/65864
D-06/04-0
FIGURE 19. PCI MINI-ACE MARK3/MICRO-ACE TE (5V TRANSCEIVER) INTERFACE TO MIL-STD-1553 BUS
PCI
Mini-ACE Mark3/
PCI Micro-ACE TE
with 5V
Transceiver
Z
0
55
55
(1:2.5)
11.6 Vpp
28 Vpp
1 FT MAX
Z
0
(1:1.79)
11.6 Vpp
20 Vpp
(1:1.4)
COUPLING
TRANSFORMER
0.75 Z
0
0.75 Z
0
LONG STUB
(TRANSFORMER
COUPLED)
20 FT MAX
28 Vpp
SHORT STUB
(DIRECT COUPLED)
Z
0 =
70 TO 85 OHMS
ISOLATION
TRANSFORMER
ISOLATION
TRANSFORMER
OR
/
THERMAL MANAGEMENT FOR PCI MICRO-ACE TE
(BGA PACKAGE)
Ball Grid Array (BGA) components necessitate that thermal
management issues be considered early in the design stage for
MIL-STD-1553 terminals. This is especially true if high transmit-
ter duty cycles are expected. The temperature range specified for
the PCI Micro-ACE TE devices refer to the temperature at the
ball, not the case.
All PCI Micro-ACE TE devices incorporate multiple package con-
nections (28-balls for 3.3V transceiver, 34 balls for 5V trans-
ceivers) which perform the dual function of transceiver circuit
ground and thermal heat sink. Each transceiver has 14 or 17
contiguous balls arranged in a rectangle. Refer to FIGURE 21
and FIGURE 22 for a visual representation of the thermal ball
locations. It is mandatory that these thermal balls be directly sol-
dered to a circuit ground plane (a circuit trace is insufficient).
Operation without an adequate ground/thermal plane is not rec-
ommended and extended exposure to these conditions may
affect device reliability.
The purpose of this ground/thermal plane is to conduct the heat
being generated by the transceivers within the package away
from the PCI Micro-ACE-TE. Since the thermal balls are con-
tiguous, a mini-plane can be created on the PCB top layer and
thermal vias can then be sunk down thru the top-side mini-plane
into the appropriate thermal plane.
FIGURE 20. THERMAL BALL LOCATIONS FOR PCI MICRO-ACE-TE (BGA PACKAGE)
V U T R P N M L K J H G F E D C B A
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
BOTTOM VIEW
S/N
D/C
TOP VIEW
ESD and Pin 1 Identifier
Notes:
1) For BU-65843B8/BU-65863B8, balls D3, D4, D5, E3, E4, E5, F1, F2, F3, F4, F5,
G3, G4, G5, L3, L4, L5, M3, M4, M5, N1, N2, N3, N4, N5, P3, P4, P5 must be
connected to a thermal plane to maintain recommended operating temperature.
2) For BU-65843B3/BU-65863B3, D3, D4, D5, E2, E3, E4, E5, F3, F4, F5, G2, G3,
G4, G5, H3, H4, H5, P11, P12, P13, P14, P15, R11, R12, R13, R14, R15, T11,
T12, T13, T14, T15, U12, U14 must be connected to a thermal plane to maintain
recommended operating temperature
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