參數(shù)資料
型號： C161CS-32R
廠商： INFINEON TECHNOLOGIES AG
英文描述： 16-Bit Single-Chip Microcontroller
中文描述： 16位單片機(jī)
文件頁數(shù)： 5/89頁
文件大小： 876K
代理商： C161CS-32R
Data Sheet
1
V3.0, 2001-01
C161CS/JC/JI
16-Bit Single-Chip Microcontroller
C166 Family
C161CS/JC/JI
High Performance 16-bit CPU with 4-Stage Pipeline
– 80 ns Instruction Cycle Time at 25 MHz CPU Clock
– 400 ns Multiplication (16
×
16 bit), 800 ns Division (32 / 16 bit)
– Enhanced Boolean Bit Manipulation Facilities
– Additional Instructions to Support HLL and Operating Systems
– Register-Based Design with Multiple Variable Register Banks
– Single-Cycle Context Switching Support
– 16 MBytes Total Linear Address Space for Code and Data
– 1024 Bytes On-Chip Special Function Register Area
16-Priority-Level Interrupt System with 59 Sources, Sample-Rate down to 40 ns
8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
Peripheral Event Controller (PEC)
Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5),
via prescaler or via direct clock input
– Additional 32 kHz Oscillator
On-Chip Memory Modules
– 2 KBytes On-Chip Internal RAM (IRAM)
– 8 KBytes On-Chip Extension RAM (XRAM)
– 256 KBytes On-Chip Mask ROM
On-Chip Peripheral Modules
– 12-Channel 10-bit A/D Converter with Programmable Conversion Time
down to 7.8
μ
s
– Two 16-Channel Capture/Compare Units (eight IO lines each)
– Two Multi-Functional General Purpose Timer Units with 5 Timers
– Two Asynchronous/Synchronous Serial Channels
– High-Speed Synchronous Serial Channel (SPI)
– On-Chip CAN Interface (Rev. 2.0B active, Full CAN / Basic CAN)
with 15 Message Objects (
C161CS 2x, C161JC 1x
)
– Serial Data Link Module (SDLM), compliant with J1850,
supporting Class 2 (
C161JC/JI
)
– IIC Bus Interface (10-bit Addressing, 400 kHz) with 2 Channels (multiplexed)
– On-Chip Real Time Clock
Up to 16 MBytes External Address Space for Code and Data
– Programmable External Bus Characteristics for Different Address Ranges
– Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit
Data Bus Width
– Five Programmable Chip-Select Signals
– Hold- and Hold-Acknowledge Bus Arbitration Support
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