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參數(shù)資料
| 型號(hào)： | C1851BCU |
| 廠商： | NEC Corp. |
| 英文描述： | I2C BUS-COMPATIBLE US MTS PROCESSING LSI |
| 中文描述： | I2C總線兼容美國的多邊貿(mào)易體制處理LSI |
| 文件頁數(shù)： | 19/60頁 |
| 文件大?。?/td> | 447K |
| 代理商： | C1851BCU |
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26
PC1851B
Data Sheet S13417EJ2V0DS00
(5) Automatic increment
The
PC1851B has the automatic increment function.
The automatic increment is applied to the subaddresses 00H to 05H of the write register.
The user can set ON/OFF the automatic increment of the subaddresses 06H to 0AH (refer to 4.1 Subaddress
List).
Automatic increment ON:
The subaddress is automatically increased.
Setting the slave address and
subaddress once enables the data of the next subaddress to be transferred
without actually setting it.
Automatic increment OFF:
The subaddress is fixed. The data of the fixed subaddress can be set time after
time.
The increment of the subaddresses 06H to 0AH is individually controlled by each automatic increment ON/OFF
bit.
For example, if the automatic increment function of the subaddress 06H is set to ON and that of the subaddress
07H set to OFF, the subaddress is to be automatically increased from 06H to 07H and then fixed to 07H.
Though the automatic increment function of the subaddress 0AH is set to ON, the subaddress is not to be
increased. After setting the data of 0AH (acknowledge bit: low level), if the next data is transferred, the acknowledge
is to be in non-acknowledge state (acknowledge bit: high level) and the data transfer from the master CPU is
aborted.
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