參數(shù)資料
型號(hào)： C1851BCU
廠商： NEC Corp.
英文描述： I2C BUS-COMPATIBLE US MTS PROCESSING LSI
中文描述： I2C總線兼容美國的多邊貿(mào)易體制處理LSI
文件頁數(shù)： 32/60頁
文件大?。?/td> 447K
代理商： C1851BCU
38
PC1851B
Data Sheet S13417EJ2V0DS00
4.4 Explanation of Read Register
(1) Power-on reset detection
Whether a power-on reset was detected is detected with bit D7 of the read register.
Figure 4-10.
Power-On Reset Detection
(2) Stereo, SAP broadcast (broadcast status) detection
Whether SAP or stereo broadcast from a broadcasting station is being broadcast is detected with bits D5 and D6
of the read register.
When a SAP signal (5 fH) or stereo pilot signal is detected, the register data becomes “1”.
Figure 4-11.
Stereo, SAP Broadcast (Broadcast Status) Detection
D7
D6
D5
D4
D3
D2
D1
D0
Power-on
reset
Noise
detection
11
1
Broadcast status
Stereo
broadcast
SAP
broadcast
Power-on reset detection
Stereo
broadcast
reception
SAP
broadcast
reception
Reception status
0
1
0
1
D7
D6
D5
D4
D3
D2
D1
D0
Power-on
reset
Noise
detection
11
Broadcast status
Stereo
broadcast
SAP
broadcast
Stereo
broadcast
reception
SAP
broadcast
reception
Reception status
Stereo broadcast
SAP broadcast (SAP signal detected)
No SAP broadcast
SAP broadcast
No Stereo broadcast
Stereo broadcast (stereo pilot signal detected)
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