參數(shù)資料
型號(hào): C515C-8RM
廠商: INFINEON TECHNOLOGIES AG
元件分類: DC/DC變換器
英文描述: RW-S Series - Econoline Regulated DC-DC Converters; Input Voltage (Vdc): 48V; Output Voltage (Vdc): 05V; Power: 2W; DIP24 Low Profile Miniature Package; 1kVDC Isolation; Feedback Regulated Output; 2:1 Wide Range Voltage Input; Continuous Short Circuit Protection; Less than 7mm Height; SMD Pinning Option; Efficiency to 87%
中文描述: 8位單片機(jī)
文件頁(yè)數(shù): 58/96頁(yè)
文件大?。?/td> 1285K
代理商: C515C-8RM
C515C
Data Sheet
54
2003-02
two consecutive instructions which set the bits WDT and SWDT each. The reset cause
(external reset or reset caused by the watchdog) can be examined by software (flag
WDTS). It must be noted, however, that the watchdog timer is halted during the idle
mode and power down mode of the processor.
Oscillator Watchdog
The oscillator watchdog unit serves for four functions:
Monitoring of the on-chip oscillator’s function
The watchdog supervises the on-chip oscillator's frequency; if it is lower than the
frequency of the auxiliary RC oscillator in the watchdog unit, the internal clock is
supplied by the RC oscillator and the device is brought into reset; if the failure
condition disappears (i.e. the on-chip oscillator has a higher frequency than the RC
oscillator), the part executes a final reset phase of typ. 1 ms in order to allow the
oscillator to stabilize; then the oscillator watchdog reset is released and the part starts
program execution again.
Fast internal reset after power-on
The oscillator watchdog unit provides a clock supply for the reset before the on-chip
oscillator has started. The oscillator watchdog unit also works identically to the
monitoring function.
Restart from the hardware power down mode
If the hardware power down mode is terminated the oscillator watchdog has to control
the correct start-up of the on-chip oscillator and to restart the program. The oscillator
watchdog function is only part of the complete hardware power down sequence;
however, the watchdog works identically to the monitoring function.
Control of external wake-up from software power-down mode
When the software power-down mode is left by a low level at the P3.2/INT0 pin, the
oscillator watchdog unit assures that the microcontroller resumes operation
(execution of the power-down wake-up interrupt) with the nominal clock rate. In the
power-down mode the RC oscillator and the on-chip oscillator are stopped. Both
oscillators are started again when power-down mode is released. When the on-chip
oscillator has a higher frequency than the RC oscillator, the microcontroller starts
operation after a final delay of typ. 1 ms in order to allow the on-chip oscillator to
stabilize.
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