參數(shù)資料
型號(hào): C515C-8RM
廠商: INFINEON TECHNOLOGIES AG
元件分類: DC/DC變換器
英文描述: RW-S Series - Econoline Regulated DC-DC Converters; Input Voltage (Vdc): 48V; Output Voltage (Vdc): 05V; Power: 2W; DIP24 Low Profile Miniature Package; 1kVDC Isolation; Feedback Regulated Output; 2:1 Wide Range Voltage Input; Continuous Short Circuit Protection; Less than 7mm Height; SMD Pinning Option; Efficiency to 87%
中文描述: 8位單片機(jī)
文件頁(yè)數(shù): 64/96頁(yè)
文件大?。?/td> 1285K
代理商: C515C-8RM
C515C
Data Sheet
60
2003-02
The following
Table 12
contains the functional description of all C515C-8E pins which
are required for OTP memory programming.
Table 12
Symbol
RESET
Pin Definitions and Functions in Programming Mode
Pin Number I/O
1)
Function
1
I
Reset
This input must be at static “0” (active) level during the
whole programming mode.
15
16
I
These pins are used to select the different access
modes in programming mode. PMSEL1,0 must satisfy
a setup time to the rising edge of PALE. When the logic
level of PMSEL1,0 is changed, PALE must be at low
level.
PMSEL0
PMSEL1
I
Programming mode selection pins
PSEL
17
I
Basic programming mode select
This input is used for the basic programming mode
selection and must be switched according
Figure 27
.
Programming mode read strobe
This input is used for read access control for OTP
memory read, version byte read, and lock bit read
operations.
Programming address latch enable
PALE is used to latch the high address lines. The high
address lines must satisfy a setup and hold time to/from
the falling edge of PALE. PALE must be at low level
whenever the logic level of PMSEL1,0 is changed.
XTAL2
Input to the oscillator amplifier.
XTAL1
Output of the inverting oscillator amplifier.
PRD
18
I
PALE
19
I
XTAL2
36
I
XTAL1
37
O
PMSEL1
0
0
1
1
PMSEL0
0
1
0
1
Access Mode
Reserved
Read version bytes
Program/read lock bits
Program/read OTP memory
byte
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