參數(shù)資料
型號(hào)： C8051F236R
廠商： Silicon Laboratories Inc
文件頁數(shù)： 131/146頁
文件大小： 0K
描述： IC 8051 MCU 8K FLASH 48TQFP
標(biāo)準(zhǔn)包裝： 1
系列： C8051F2xx
核心處理器： 8051
芯體尺寸： 8-位
速度： 25MHz
連通性： SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 8KB（8K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 1.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 48-TQFP
包裝： 剪切帶 (CT)
其它名稱： 336-1013-1
C8051F2xx
Rev. 1.6
85
10. Flash Memory
This MCU includes 8 k + 128 bytes of on-chip, re-programmable Flash memory for program code and non-
volatile data storage. The Flash memory can be programmed in-system, a single byte at a time, through
the JTAG interface or by software using the MOVX instruction. Once cleared to 0, a Flash bit must be
erased to set it back to 1. The bytes would typically be erased (set to 0xFF) before being reprogrammed.
The write and erase operations are automatically timed by hardware for proper execution. Data polling to
determine the end of the write/erase operation is not required. The Flash memory is designed to withstand
at least 20,000 write/erase cycles. Refer to Table 10.1 for the electrical characteristics of the Flash mem-
ory.
10.1. Programming The Flash Memory
The simplest means of programming the Flash memory is through the JTAG interface using programming
tools provided by Silicon Labs or a third party vendor. This is the only means for programming a non-ini-
tialized device. For details on the JTAG commands to program Flash memory, see Section 18.1.
The Flash memory can be programmed by software using the MOVX instruction with the address and data
byte to be programmed provided as normal operands. Before writing to Flash memory using MOVX, flash
write operations must be enabled by setting the PSWE Program Store Write Enable bit (PSCTL.0) to logic
1. Writing to Flash remains enabled until the PSWE bit is cleared by software.
To ensure the contents of the Flash contents, it is strongly recommended that the on-chip VDD monitor be
enabled (by tieing the MONEN pin 'high') in any application that writes and/or erases Flash memory from
software.
Writes to Flash memory can clear bits but cannot set them. Only an erase operation can set bits in Flash.
The byte location to be programmed must be erased before a new value can be written. The 8kbyte Flash
memory is organized in 512-byte sectors. The erase operation applies to an entire sector (setting all bytes
in the sector to 0xFF). Setting the PSEE Program Store Erase Enable bit (PSCTL.1) and PSWE Program
Store Write Enable bit (PSCTL.0) to logic 1 and then using the MOVX command to write a data byte to any
byte location within the sector will erase an entire 512-byte sector. The data byte written can be of any
value because it is not actually written to the Flash. Flash erasure remains enabled until the PSEE bit is
cleared by software. The following sequence illustrates the algorithm for programming the Flash memory
by software:
1.
Disable interrupts.
2.
Enable Flash Memory write/erase in FLSCL Register using FLASCL bits.
3.
Set PSEE (PSCTL.1) to enable Flash sector erase.
4.
Set PSWE (PSCTL.0) to enable Flash writes.
5.
Use MOVX to write a data byte to any location within the 512-byte sector to be erased.
6.
Clear PSEE to disable Flash sector erase.
7.
Use MOVX to write a data byte to the desired byte location within the erased 512-byte sector.
Repeat until finished. (Any number of bytes can be written from a single byte to and entire
sector.)
8.
Clear the PSWE bit to disable Flash writes.
Write/Erase timing is automatically controlled by hardware based on the prescaler value held in the Flash
Memory Timing Prescaler register (FLSCL). The 4-bit prescaler value FLASCL determines the time inter-
val for write/erase operations. The FLASCL value required for a given system clock is shown in SFR Defi-
nition 10.2, along with the formula used to derive the FLASCL values. When FLASCL is set to 1111b, the
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