參數(shù)資料
型號: C9821GQ
英文描述: Up to 5A ULDO linear regulator
中文描述: 單時鐘驅(qū)動器| SSOP封裝| 24針|塑料
文件頁數(shù): 5/18頁
文件大?。?/td> 121K
代理商: C9821GQ
Direct Rambus
Plus Clock Generator
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07092 Rev. **
05/03/2001
Page 5 of 18
APPROVED PRODUCT
C9821
Table of Frequencies and Gear Ratios (Cont.)
Pclk
67
100
100
133
133
150
Refclk
33
50
50
67
67
75
Busclk
267
300
400
400
356
400
Synclk
67
75
100
100
89
100
A
8
6
8
6
16
16
B
1
1
1
1
3
3
M
2
8
2
8
6
6
N
2
6
2
6
4
4
Ratio
1.0
1.33
1.0
1.33
1.5
1.5
F@PD
33
12.5
25
16.7
22
25
Table 1A. Frequencies, Dividers, and Gear Ratios
A: Feedback divider in the DRCG PLL.
B: Refclk divider in the DRCG PLL
M: Pclk divider in the gear ratio logic.
N: synclk divider in the gear ratio logic.
Table 1A above shows several supported Pclk and Busclk frequencies, the corresponding A and B dividers required
Ratio as defined by Pclk/Synclk (same as M/N). The column
gives the divided down frequency (in MHz) at
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