參數(shù)資料
型號: CAP1028-1-BP-TR
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, QCC20
封裝: 4 X 4 MM, ROHS COMPLAINT, QFN-20
文件頁數(shù): 5/69頁
文件大?。?/td> 948K
代理商: CAP1028-1-BP-TR
8 Channel Capacitive Touch Sensor with 2 LED Drivers
Datasheet
SMSC CAP1028
13
Revision 1.0 (06-16-09)
DATASHEET
SMBus Timing
Input Capacitance
CIN
5pF
Clock Frequency
fSMB
10
400
kHz
Spike Suppression
tSP
50
ns
Bus free time Start to
Stop
tBUF
1.3
us
Setup Time: Start
tSU:STA
0.6
us
Setup Time: Stop
tSU:STP
0.6
us
Data Hold Time
tHD:DAT
0.6
6
us
Data Setup Time
tSU:DAT
0.6
72
us
Clock Low Period
tLOW
1.3
us
Clock High Period
tHIGH
0.6
us
Clock/Data Fall time
tFALL
300
ns
Min = 20+0.1CLOAD ns
Clock/Data Rise time
tRISE
300
ns
Min = 20+0.1CLOAD ns
Capacitive Load
CLOAD
400
pF
per bus line
BC-Link Timing
Clock Period
tCLK
250
ns
Data Hold Time
tHD:DAT
0ns
Data Setup Time
tSU:DAT
30
ns
Data must be valid before clock
Clock Duty Cycle
Duty
40
50
60
%
SPI Timing
Clock Period
tP
250
ns
Clock Low Period
tLOW
0.4 x tP
0.6 x tP
ns
Clock High Period
tHIGH
0.4 x tP
0.6 x tP
ns
Clock Rise / Fall
time
tRISE /
tFALL
0.1 x tP
ns
Data Output Delay
tD:CLK
10
ns
Data Setup Time
tSU:DAT
20
ns
Data Hold Time
tHD:DAT
20
ns
SPI_CS# to
SPI_CLK setup time
tSU:CS
0ns
Wake Time
tWAKE
10
20
us
SPI_CS# asserted to CLK assert
Table 2.2 Electrical Specifications (continued)
VDD = 3V to 3.6V, TA = 0°C to 100°C, all Typical values at TA = 27°C unless otherwise noted.
CHARACTERISTIC
SYMBOL
MIN
TYP
MAX
UNIT
CONDITIONS
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