參數(shù)資料
型號(hào)： CAP1028-1-BP-TR
廠(chǎng)商： STANDARD MICROSYSTEMS CORP
元件分類(lèi)： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, QCC20
封裝： 4 X 4 MM, ROHS COMPLAINT, QFN-20
文件頁(yè)數(shù)： 54/69頁(yè)
文件大小： 948K
代理商： CAP1028-1-BP-TR
58
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3822 Group
MITSUBISHI MICROCOMPUTERS
Table 31 Timing requirements 1 (Extended operating temperature version)
(VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = –40 to 85 °C, unless otherwise noted)
2
125
45
40
250
105
80
800
370
220
100
Note: When bit 6 of address 001A16 is “1” (clock synchronous).
Divide this value by four when bit 6 of address 001A16 is “0” (UART).
Reset input “L” pulse width
Main clock input cycle time (XIN input)
Main clock input “H” pulse width
Main clock input “L” pulse width
CNTR0, CNTR1 input cycle time
CNTR0, CNTR1 input “H” pulse width
CNTR0, CNTR1 input “L” pulse width
INT0 to INT3 input “H” pulse width
INT0 to INT3 input “L” pulse width
Serial I/O clock input cycle time (Note)
Serial I/O clock input “H” pulse width (Note)
Serial I/O clock input “L” pulse width (Note)
Serial I/O input set up time
Serial I/O input hold time
tw(RESET)
tc(XIN)
twH(XIN)
twL(XIN)
tc(CNTR)
twH(CNTR)
twL(CNTR)
twH(INT)
twL(INT)
tc(SCLK)
twH(SCLK)
twL(SCLK)
tsu(RXD–SCLK)
th(SCLK–RXD)
Symbol
Parameter
Limits
Min.
s
ns
Unit
Typ.
Max.
Table 32 Timing requirements 2 (Extended operating temperature version)
(VCC = 2.0 to 4.0 V, VSS = 0 V, Ta = –20 to 85 °C, and VCC = 3.0 to 4.0 V, Ta = –40 to –20 °C, unless otherwise noted)
2
125
45
40
900/(VCC–0.4)
450/(VCC–0.4)–20
230
2000
950
400
200
Reset input “L” pulse width
Main clock input cycle time (XIN input)
Main clock input “H” pulse width
Main clock input “L” pulse width
CNTR0, CNTR1 input cycle time
CNTR0, CNTR1 input “H” pulse width
CNTR0, CNTR1 input “L” pulse width
INT0 to INT3 input “H” pulse width
INT0 to INT3 input “L” pulse width
Serial I/O clock input cycle time (Note)
Serial I/O clock input “H” pulse width (Note)
Serial I/O clock input “L” pulse width (Note)
Serial I/O input set up time
Serial I/O input hold time
tw(RESET)
tc(XIN)
twH(XIN)
twL(XIN)
tc(CNTR)
twH(CNTR)
twL(CNTR)
twH(INT)
twL(INT)
tc(SCLK)
twH(SCLK)
twL(SCLK)
tsu(RXD–SCLK)
th(SCLK–RXD)
Symbol
Parameter
Limits
Min.
s
ns
Unit
Max.
Note: When bit 6 of address 001A16 is “1” (clock synchronous).
Divide this value by four when bit 6 of address 001A16 is “0” (UART).
Typ.
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