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參數(shù)資料
| 型號(hào)： | CAT5273ZI-50-GT3 |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 6/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC POT DPP 50K 256TAP 10MSOP |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 接片： | 256 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 100 ppm/°C |
| 存儲(chǔ)器類型： | 易失 |
| 接口： | I²C（設(shè)備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
CAT5271, CAT5273
http://onsemi.com
2
Wiper Control
SDA
A1
W1
SCL
Figure 1. CAT5271 Functional Block Diagram
I2
C
Interface
VCC
B1
GND
Register 1
Wiper Control
A2
W2
B2
Register 2
Figure 2. CAT5273 Functional Block Diagram
Wiper Control
SDA
W1
SCL
VCC
B1
GND
AD0
AD1
Register 1
Wiper Control
W2
B2
Register 2
Control Logic
I2
C
Interface
Table 1. PIN FUNCTION DESCRIPTION
CAT5271
CAT5273
Pin No.
Pin Name
Description
Pin Name
Description
1
B1
B1 Terminal
B1
B1 Terminal
2
A1
A1 Terminal
AD0
Device Address Bit 0
3
W2
W2 Terminal
W2
W2 Terminal
4
GND
Digital Ground
GND
Digital Ground
5
VDD
Positive Power Supply
VDD
Positive Power Supply
6
SCL
Serial Clock Input
SCL
Serial Clock Input
7
SDA
Serial Data Input / Output
SDA
Serial Data Input / Output
8
A2
A2 Terminal
AD1
Device Address Bit 1
9
B2
B2 Terminal
B2
B2 Terminal
10
W1
W1 Terminal
W1
W1 Terminal
Table 2. ABSOLUTE MAXIMUM RATINGS (Note 1)
Rating
Value
Unit
VDD to GND
0.3 to 6.5
V
A1, B1, W1, A2, B2, W2 Voltage to GND
VDD
IMAX
20
mA
Digital Inputs and Output Voltage to GND
0 to 6.5
V
Operating Temperature Range
40 to +85
C
Maximum Junction Temperature (TJMAX)
150
C
Storage Temperature
65 to +150
C
Lead Temperature (Soldering, 10 sec)
300
C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Maximum terminal current is bounded by the maximum current handling of the switches, maximum power dissipation of the package, and
maximum applied voltage across any two of the A, B, and W terminals at a given resistance.
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