參數(shù)資料
型號: CBTL06DP212EE
廠商: NXP SEMICONDUCTORS
元件分類: 編、解碼器及復(fù)用、解復(fù)用
英文描述: High-performance DisplayPort Gen2 2 : 1 multiplexer
中文描述: MULTIPLEXER, PBGA48
封裝: 5 X 5 MM, 0.80 MM HEIGHT, LEAD FREE, PLASTIC, TFBGA-48
文件頁數(shù): 17/18頁
文件大?。?/td> 147K
代理商: CBTL06DP212EE
CBTL06DP212
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 21 February 2011
8 of 18
NXP Semiconductors
CBTL06DP212
High-performance DisplayPort Gen2 2 : 1 multiplexer
9.
Limiting values
[1]
Human Body Model: ANSI/EOS/ESD-S5.1-1994, standard for ESD sensitivity testing, Human Body Model -
Component level; Electrostatic Discharge Association, Rome, NY, USA.
[2]
Charged Device Model: ANSI/EOS/ESD-S5.3-1-1999, standard for ESD sensitivity testing, Charged Device
Model - Component level; Electrostatic Discharge Association, Rome, NY, USA.
10. Recommended operating conditions
[1]
HPD input is tolerant to 5 V input, provided a 1 k
Ω series resistor between the voltage source and the pin is
[2]
DDC/AUX inputs are tolerant to 5 V input, provided a 2.2 k
Ω series resistor between the voltage source and
the pin is placed in series. See Section 12.1 “Special considerations”.
Table 7.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDD
supply voltage
0.3
+5
V
Tcase
case temperature
40
+85
°C
VESD
electrostatic discharge
voltage
HBM
8000
V
HBM; CMOS inputs
2000
V
CDM
1000
V
CDM; CMOS inputs
500
V
Table 8.
Recommended operating conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDD
supply voltage
3.0
3.3
3.6
V
VI
input voltage
CMOS inputs
0.3
-
VDD +0.3
V
HPD inputs
0.3
-
VDD +0.3
V
DDC/AUX inputs
0.3
-
VDD +0.3
V
other inputs
0.3
-
+2.6
V
Tamb
ambient temperature
operating in free air
40
-
+85
°C
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