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參數(shù)資料
型號: CD74HC4046AEE4
廠商: Texas Instruments
文件頁數(shù): 3/34頁
文件大?。?/td> 0K
描述: IC PLL W/VCO 16-DIP
標準包裝: 25
系列: 74HC
類型: 鎖相環(huán)路(PLL)
PLL:
輸入: CMOS
輸出: CMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:4
差分 - 輸入:輸出: 無/無
頻率 - 最大: 38MHz
除法器/乘法器: 無/無
電源電壓: 2 V ~ 6 V
工作溫度: -55°C ~ 125°C
安裝類型: 通孔
封裝/外殼: 16-DIP(0.300",7.62mm)
供應商設備封裝: 16-PDIP
包裝: 管件
11
Center Frequency
C1 = 40pF
R1 = 3k
R2 =
VCOIN =
VCC/2
3
7
10
-
MHz
4.5
12
17
-
MHz
6
14
21
-
MHz
Frequency Linearity
fVCO
R1 = 100k
R2 =
C1 = 100pF
3
-
0.4
-
%
4.5
-
0.4
-
%
6
-
0.4
-
%
Offset Frequency
R2 = 220k
C1 = 1nF
3
-
400
-
kHz
4.5
-
400
-
kHz
6
-
400
-
kHz
DEMODULATOR SECTION
VOUT VS fIN
R1 = 100k
R2 =
C1 = 100pF
RS = 10k
R3 = 100k
C2 = 100pF
3
-
mV/kHz
4.5
-
330
-
mV/kHz
6
-
mV/kHz
HCT TYPES
PHASE COMPARATOR SECTION
Propagation Delay
tPHL, tPLH
SIGIN, COMPIN to PCIOUT
CL = 50pF
4.5
-
45
-
56
-
68
ns
SIGIN, COMPIN to PCPOUT tPHL, tPLH
CL = 50pF
4.5
-
68
-
85
-
102
ns
SIGIN, COMPIN to PC3OUT tPHL, tPLH
CL = 50pF
4.5
-
58
-
73
-
87
ns
Output Transition Time
tTLH, tTHL
CL = 50pF
4.5
-
15
-
19
-
22
ns
Output Enable Time, SIGIN,
COMPIN to PC2OUT
tPZH, tPZL
CL = 50pF
4.5
-
60
-
75
-
90
pF
Output Disable Time, SIGIN,
COMPIN to PCZOUT
tPHZ, tPLZ
CL = 50pF
4.5
-
68
-
85
-
102
pF
AC Coupled Input Sensitivity
(P-P) at SIGIN or COMPI
VI(P-P)
4.5
-
15
-
mV
VCO SECTION
Frequency Stability with
Temperature Change
f
T
R1 = 100k,
R2 =
4.5
-
0.11
-
%/oC
Maximum Frequency
fMAX
C1 = 50pF
R1 = 3.5k
R2 =
4.5
-
24
-
MHz
C1 = 0pF
R1 = 9.1k
R2 =
4.5
-
38
-
MHz
Center Frequency
C1 = 40pF
R1 = 3k
R2 =
VCOIN =
VCC/2
4.5
12
17
-
MHz
Frequency Linearity
fVCO
R1 = 100k
R2 =
C1 = 100pF
4.5
-
0.4
-
%
Switching Specications CL = 50pF, Input tr, tf = 6ns (Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
VCC (V)
25oC
-40oC TO
85oC
-55oC TO
125oC
UNITS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
CD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A
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