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參數(shù)資料
| 型號(hào)： | CDC930DL |
| 英文描述： | CPU SYSTEM CLOCK GENERATOR|SSOP|56PIN|PLASTIC |
| 中文描述： | CPU系統(tǒng)時(shí)鐘發(fā)生器| SSOP封裝| 56PIN |塑料 |
| 文件頁數(shù)： | 7/17頁 |
| 文件大?。?/td> | 240K |
| 代理商： | CDC930DL |
CDC930
133-MHz DIFFERENTIAL CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS
WITH 3-STATE OUTPUTS
SCAS641 – JULY 2000
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIK
RI
Input clamp voltage
VDD = 3.135 V,
VDD = 3.465 V,
VDD = 3.135 V,
II = –18 mA
VI = VDD –0.5 V
VI = VDD –0.5 V
–1.2
V
k
mA
Input resistance
XIN-XOUT
100
XOUT
50
IIH
High-level input current
MultSel0, MultSel1,
SelA, SelB
VDD = 3.465 V,
VI = VDD
10
μ
A
SEL100/133
SPREAD, PWRDWN
VDD = 3.465 V,
VI = VDD
5
μ
A
XOUT
VDD = 3.135 V,
VO = 0 V
–5
mA
IIL
Low level input current
Low-level input current
MultSel0, MultSel1,
SelA, SelB,
VDD = 3.465 V,
VI = GND
–10
μ
A
SEL100/133
SPREAD, PWRDWN
VDD = 3.465 V,
VI = GND
–5
μ
A
I_REF
VDD = 3.465 V,
Rr = 221
SELA, SELB = H,
SEL100/133 H
→
L
VO = VDD or GND
PWRDWN = H
–5.5
mA
IOZ
High-impedance-state output current
VDD = 3.465 V
±
10
μ
A
IDD(Z)
High-impedance-state supply current
VDD = 3.465 V
SELA, SELB = H,
SEL100/133 H
→
L
PWRDWN = H
40
mA
IDD(PD)
PWRDWN state supply current
VDD = 3.465 V,
PWRDWN = L
30
mA
IDD
Dynamic supply current
VDD = 3.465 V
PWRDWN = H,
HCLK = 133 MHz,
SSC = ON/OFF,
CL = MAX
Rref = 475
,
IOUT = 6
×
Iref
VI = VDD or GND
VI = 0.3 V
250
mA
CI
C(XTAL)
All typical values are measured at their respective nominal VDD values.
These parameters are ensured by design and lab characterization, not 100% production tested.
Control SELx, PWRDWN, SPREAD threshold levels during FUNC w/c level tests.
CL = MAX = 5 pF, Rs = 33.2
, Rp = 49.9
at HCLK/HCLK (Type X1)
CL = MAX = 20 pF, RL = 500
at 48 MHz, REF (Type 3)
CL = MAX = 30 pF, RL = 500
at PCIx, 3V66, 3VMREF, 3VMREF (Type 5)
Input capacitance
VDD = 3.3 V,
VDD = 3.3 V,
2
5
pF
Crystal terminal capacitance
18
pF
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參數(shù)描述 |
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| CDC930DLG4 | 功能描述:鎖相環(huán) - PLL 133-MHz Clock Synth/ Drvr RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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| CDC950DGG | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 133MHz Clk Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDC950DGGG4 | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 133MHz Clk Synth RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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