參數(shù)資料
型號(hào): CLRC66301HN
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Contactless reader IC
封裝: CLRC66301HN<SOT617-3 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-3.html<1<Always Pb-free,;CLRC66301HN<SOT617-3 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-3.html<
文件頁(yè)數(shù): 15/100頁(yè)
文件大?。?/td> 856K
代理商: CLRC66301HN
CLRC663
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Preliminary data sheet
COMPANY PUBLIC
Rev. 3.1 — 26 September 2011
171131
21 of 126
NXP Semiconductors
CLRC663
Contactless reader IC
9.4.2 WaterLevel_Reg
Defines the level for FiFo under- and overflow warning.
Table 22:
Description of
FiFoControl_Reg bits
Bit
Symbol
Description
7
FiFoSize
Set to logic 1, FiFo size 255 bytes;
Set to logic 0, FiFo size is 512 bytes.
The size can only be changed, when at the same write command a
FiFo Flash is executed
6
HiAlert
Set to logic 1, when the number of bytes stored in the FiFo buffer fulfils
the following equation:
HiAlert = (FiFoSize - FiFoLength) <= WaterLevel
5
LoAlert
Set to logic 1, when the number of bytes stored in the FiFo buffer fulfils
the following conditions:
LoAlert =1 if FiFoLength <= WaterLevel
4
FiFoFlash
Set to logic 1 empties the FiFo buffer. Reading this bit will always
return 0
3-
RFU
2
WaterLevel
Defines the higher bit for the waterlevel. This bit is only needed in the
512 bit FiFo mode
1 to 0
FiFoLength
Defines the two higher bit for the FiFo length. These two bits are only
needed in the 512 bit FiFo mode
Table 23:
WaterLevel_Reg register (address 03h); reset value: 05h
Bit
7
6
5
4
3
2
1
0
Symbol
WaterLevel
Access
rights
r/w
Table 24:
Description of WaterLevel_Reg bits
Bit
Symbol
Description
7 to 0
WaterLevel
This register defines a warning level to indicate a FiFo-buffer overflow
or underflow:
The bit HiAlert bit in FiFo Control is set to logic 1, if the remaining
number of bytes in the FIFO-buffer space is equal or less than the
defined number of WaterLevel bytes.
The bit LoAlert bit in FiFo control is set to logic 1, if equal or less than
WaterLevel bytes are in the FiFo.
Note: For the calculation of HiAlert and LoAlert see register description
of these bits.
Note: In the 512 byte mode also the higher bit of FiFoLength in the
FiFoControl Register have to be taken into account
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